Lyra 24P

Introduction

The Lyra 24P is a secure, high-performance wireless module optimized for the needs of battery and line powered IoT devices running on Bluetooth networks.

Based on the Series 2 EFR32BG24 SoC, it enables Bluetooth® Low Energy connectivity, delivering exceptional RF performance and energy efficiency, industry leading Secure Vault® technology, and future-proofing capabilities.

The Lyra 24P is a complete solution offered with robust and fully upgradeable software stacks, global regulatory certifications, advanced development and debugging tools, and documentation that simplifies and minimizes the development cycle of your end-product, helping to accelerate its time-to-market.

Overview

This document describes key hardware aspects of the Lyra 24P. This document is intended to assist device manufacturers and related parties with the integration of this radio into their host devices. Data in this document is drawn from several sources. For full documentation on the Lyra 24P, visit:

https://www.ezurio.com/lyra24-series

This datasheet is subject to change. Please contact Ezurio for further information.

Application Areas

• Smart Home Devices
• Lighting
• Building Automation and Security
• Gateways and Digital Assistants
• Bluetooth mesh Low Power Node

Features & Benefits

The Lyra 24P device features and benefits are described below.

• Bluetooth Low Energy 5.4
• Bluetooth Mesh connectivity
• Built-in antenna or RF pin
• +10 or +20 dBm TX output power (see 13.2, 13.3, and 13.5)
• -98.5 dBm BLE 1M RX sensitivity
• 32-bit ARM® Cortex®-M33 core at 39 MHz
• 1536/256 kB of Flash/RAM memory
• Vault High or Vault Mid security
• Rich set of analog and digital peripherals
• 26 GPIO pins
• -40 °C to 105 °C
• 12.9 mm x 15.0 mm

Specification Summary

Processor / SoC / Chipset

Bluetooth

Power

Mechanical

Software

Environmental

Certifications

Development

Warranty

Hardware Architecture

Block Diagrams

The Lyra 24P module is a highly integrated, high-performance system with all the hardware components needed to enable 2.4 GHz wireless connectivity and support robust networking capabilities via multiple wireless protocols.

Built around the EFR32BG24 Wireless SoC, the Lyra 24P includes a built-in antenna, an RF matching network (optimized for transmit power efficiency), supply decoupling and filtering components, an LC tank for DC-DC conversion, a 39 MHz reference crystal, and an RF shield. Also, it supports the use of an external 32 kHz crystal as a low frequency reference signal via GPIO pins for use cases demanding maximum energy efficiency.

For designs where an external antenna solution may be beneficial, a module variant with a 50 Ω-matched RF pin instead of the built-in antenna is available (for Lyra 24P, RF, 20dBm, RF Trace only).

Because the RF matching network is optimized for transmit power efficiency, modules rated for +20 dBm will show non-optimal current consumption and performance when operated at a lower output power (i.e. +10 or 0 dBm).

A simplified internal schematic for the Lyra 24P module is shown below.

EFR32BG24 SoC

The EFR32BG24 SoC features a 32-bit ARM Cortex M33 core, a 2.4 GHz high-performance radio, 1536 kB of Flash memory, 256 kB of RAM, a dedicated core for security, a rich set of MCU peripherals, and various clock management and serial interfacing options. See the EFR32xG24 Reference Manual for details.

Integrated Antenna

Lyra 24P modules come with two antenna solutions variants: A built-in antenna or a 50 Ohms matched RF pin to support an external antenna. Typical performance characteristics of the built-in antenna are detailed in table below.

External Antenna

Lyra 24P module can be used with external antennas (certified by Ezurio) and requires a RF 50 Ohm track (Ground Coplanar Waveguide) to be designed to run from Lyra 24P module RFOUT (pin 33) to an RF antenna connector (IPEX MHF 4) on the host PCB. The 50 ohm RF track design and length MUST be copied as defined in section Lyra 24P 50 Ohms RF Track Design for Connecting External Antenna with the Lyra 24P Module, 20dBm, RF Pad Variant (453-00148).

The list of supported external antennas (certified by Ezurio) are listed in section External Antenna Integration with the Lyra 24P Module.

Power Supply

The Lyra 24P requires a single nominal supply level (VDD) to operate and supports an operating range of 1.8 to 3.8 V. The nominal level needed for +10 dBm devices (part number: 453-00142) is 3.0 V whereas +20 dBm devices (part number: 453-00145 and 453-00148) require 3.3 V in order to achieve higher TX output power. All necessary decoupling, filtering and DC-DC-related components are included in the module.

GPIO

The Lyra 24P has up to 26 General Purpose Input/Output pins. Each GPIO pin can be individually configured as either an output or input. More advanced configurations including open-drain, open-source, and glitch-filtering can be configured for each individual GPIO pin. The GPIO pins can be overridden by peripheral connections, like SPI communication. Each peripheral connection can be routed to several GPIO pins on the device. The input value of a GPIO pin can be routed through the Peripheral Reflex System to other peripherals. The GPIO subsystem supports asynchronous external pin interrupts.

All the pins on ports A and port B are EM2 capable. These pins may be used by Low-Energy peripherals in EM2/3 and may also be used as EM2/3 pin wake-ups. Pins on ports C and D are latched/retained in their current state when entering EM2 until EM2 exit upon which internal peripherals could once again drive those pads.

A few GPIOs also have EM4 wake functionality. These pins are listed in Alternate Pin Functions.

Security

Lyra 24P modules support one of two levels in the Security Portfolio offered by Silicon Labs: Secure Vault Mid or Secure Vault High.   Lyra 24P modules support Secure Vault High.

Secure Vault is a collection of technologies that deliver state-of-the-art security and upgradability features to protect and future proof IoT devices against costly threats, attacks, and tampering. A dedicated security CPU enables the Secure Vault functions and isolates cryptographic functions and data from the Cortex-M33 core.  Lyra 24P support Secure Vault High.

Secure Vault Features

Secure Boot with Root of Trust and Secure Loader (RTSL)

The Secure Boot with RTSL authenticates a chain of trusted firmware that begins from an immutable memory (ROM).

It prevents malware injection, prevents rollback, ensures that only authentic firmware is executed, and protects Over The Air updates. For more information about this feature, see Silicon Labs’ AN1218: Series 2 Secure Boot with RTSL.

Cryptographic Accelerator

The Cryptographic Accelerator is an autonomous hardware accelerator with Differential Power Analysis (DPA) countermeasures to protect keys.

It supports AES encryption and decryption with 128/192/256-bit keys, ChaCha20 encryption, and Elliptic Curve Cryptography (ECC) to support public key operations, and hashes.

Supported block cipher modes of operation for AES include:

• ECB (Electronic Code Book)
• CTR (Counter Mode)
• CBC (Cipher Block Chaining)
• CFB (Cipher Feedback)
• GCM (Galois Counter Mode)
• CCM (Counter with CBC-MAC)
• CBC-MAC (Cipher Block Chaining Message Authentication Code)
• GMAC (Galois Message Authentication Code)

The Cryptographic Accelerator accelerates Elliptical Curve Cryptography and supports the NIST (National Institute of Standards and Technology) recommended curves including P-192, P-256, P-384, and P-521 for ECDH (Elliptic Curve Diffie-Hellman) key derivation, and ECDSA (Elliptic Curve Digital Signature Algorithm) sign and verify operations. Also supported is the non-NIST Curve25519 for ECDH and Ed25519 for EdDSA (Edwards-curve Digital Signature Algorithm) sign and verify operations.

Secure Vault also supports ECJ-PAKE (Elliptic Curve variant of Password Authenticated Key Exchange by Juggling) and PBKDF2 (Password-Based Key Derivation Function 2).

Supported hashes include SHA-1, SHA-2/256/384/512 and Poly1305.

This implementation provides a fast and energy efficient solution to state of the art cryptographic needs.

True Random Number Generator

The True Random Number Generator module is a non-deterministic random number generator that harvests entropy from a thermal energy source. It includes start-up health tests for the entropy source as required by NIST SP800-90B and AIS-31 as well as online health tests required for NIST SP800-90C.

The TRNG is suitable for periodically generating entropy to seed an approved pseudo random number generator.

Secure Debug with Lock/Unlock

For obvious security reasons, it is critical for a product to have its debug interface locked before being released in the field.

In addition, Secure Vault High also provides a secure debug unlock function that allows authenticated access based on public key cryptography. This functionality is particularly useful for supporting failure analysis while maintaining confidentiality of IP and sensitive end-user data.

For more information about this feature, see Silicon Labs’ AN1190: Series 2 Secure Debug.

DPA Countermeasures

The AES and ECC accelerators have Differential Power Analysis (DPA) countermeasures support. This makes it very expensive from a time and effort standpoint to use DPA to recover secret keys.

Secure Key Management with PUF

Key material in Secure Vault High products is protected by "key wrapping" with a standardized symmetric encryption mechanism. This method has the advantage of protecting a virtually unlimited number of keys, limited only by the storage that is accessible by the Cortex-M33, which includes off-chip storage as well. The symmetric key used for this wrapping and unwrapping must be highly secure because it can expose all other key materials in the system. The Secure Vault Key Management system uses a Physically Unclonable Function (PUF) to generate a persistent device-unique seed key on power up to dynamically generate this critical wrapping/unwrapping key which is only visible to the AES encryption engine and is not retained when the device loses power.

Anti-Tamper

Secure Vault High devices provide internal tamper protection which monitors parameters such as voltage, temperature, and electro- magnetic pulses as well as detecting tamper of the security sub-system itself. Additionally, 8 external configurable tamper pins support external tamper sources, such as enclosure tamper switches.

For each tamper event, the user is able to select the severity of the tamper response ranging from an interrupt, to a reset, to destroying the PUF reconstruction data which will make all protected key materials un-recoverable and effectively render the device inoperable. The tamper system also has an internal resettable event counter with programmable trigger threshold and refresh periods to mitigate false positive tamper events.

For more information about this feature, see Silicon Labs’ AN1247: Anti-Tamper Protection Configuration and Use.

Secure Attestation

Secure Vault High products support Secure Attestation, which begins with a secure identity that is created during the Silicon Labs manufacturing process. During device production, each device generates its own public/private keypair and securely stores the wrapped private key into immutable OTP memory and this key never leaves the device. The corresponding public key is extracted from the device and inserted into a binary DER-encoded X.509 device certificate, which is signed into a Silicon Labs CA chain and then programmed back into the chip into an immutable OTP memory.

The secure identity can be used to authenticate the chip at any time in the life of the product. The production certification chain can be requested remotely from the product. This certification chain can be used to verify that the device was authentically produced by Silicon Labs. The device unique public key is also bound to the device certificate in the certification chain. A challenge can be sent to the chip at any point in time to be signed by the device private key. The public key in the device certificate can then be used to verify the challenge response, proving that the device has access to the securely stored private key, which prevents counterfeit products or impersonation attacks.

For more information about this feature, see Silicon Labs’ AN1268: Authenticating Silicon Labs Devices Using Device Certificates.

Pin-Out / Package Layout

Lyra 24P 36-Pin PCB Module Pinout

For GPIO pin to peripheral assignment in AT firmware, see User Guide – AT Interface Application – Lyra 24 Series.

The following table provides package pin connections and general descriptions of pin functionality. For detailed information on the supported features for each GPIO pin, see Alternate Pin Functions, Analog Peripheral Connectivity, and Digital Peripheral Connectivity.

Alternate Pin Functions

Some GPIOs support alternate functions like debugging, wake-up from EM4, external low frequency crystal access, etc.. The following table shows which module pins have alternate capabilities and the functions they support. Refer to the SoC's reference manual for more details.

Analog Peripheral Connectivity

Many analog resources are routable and can be connected to numerous GPIO's. The table below indicates which peripherals are available on each GPIO port. When a differential connection is being used, positive inputs are restricted to the EVEN pins and Negative inputs are restricted to the ODD pins. When a single ended connection is being used positive input is available on all pins. See the SoC’s Reference Manual for more details on the ABUS and analog peripherals, EFR32BG24 SoC.

Digital Peripheral Connectivity

Many digital resources are routable and can be connected to numerous GPIO's. The table below indicates which peripherals are available on each GPIO port.

Mechanical Drawings

Electrical Characteristics

All electrical parameters in all tables are specified under the following conditions, unless stated otherwise:

• Typical values are based on TA=25 °C and VDD supply at 3.0 V, by production test and/or technology characterization.
• Radio performance numbers are measured in conducted mode, based on Silicon Laboratories reference designs using output power-specific external RF impedance-matching networks for interfacing to a 50 Ω antenna.
• Minimum and maximum values represent the worst conditions across supply voltage, process variation, and operating temperature, unless stated otherwise.

Absolute Maximum Ratings

Recommended Operating Conditions

Current Consumption

MCU Current Consumption with 3 V Supply

Unless otherwise indicated, typical conditions are: VDD = 3.0 V, DC-DC in regulation. Voltage scaling level = VSCALE1. TA = 25 °C. Minimum and maximum values in this table represent the worst conditions across process variation at TA = 25 °C.

Radio Current Consumption with 3 V Supply

RF current consumption measured with MCU in EM1 and all MCU peripherals disabled. Unless otherwise indicated, typical conditions are: VDD = 3.0 V, DC-DC in regulation. TA = 25 °C.

DC Electrical Characteristics

RF Transmitter General Characteristics for the 2.4 GHz Band

Unless otherwise indicated, typical conditions are: VDD = 3.0 V, DC-DC in regulation. RF center frequency 2.45 GHz. TA=25°C.

RF Receiver General Characteristics for the 2.4 GHz Band

Unless otherwise indicated, typical conditions are: VDD = 3.0 V, DC-DC in regulation. RF center frequency 2.45 GHz. TA = 25°C.

Unless otherwise indicated, typical conditions are: VDD = 3.0 V, DC-DC in regulation. RF center frequency 2.45 GHz. TA = 25 °C.

RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 2 Mbps Data Rate

Unless otherwise indicated, typical conditions are: VDD = 3.0 V, DC-DC in regulation. RF center frequency 2.45 GHz. TA = 25 °C.

RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 500 kbps Data Rate

Unless otherwise indicated, typical conditions are: VDD = 3.0 V, DC-DC in regulation. RF center frequency 2.45 GHz. TA = 25 °C.

RF Receiver Characteristics for Bluetooth Low Energy in the 2.4 GHz Band 125 kbps Data Rate

Unless otherwise indicated, typical conditions are: VDD = 3.0 V, DC-DC in regulation. RF center frequency 2.45 GHz. TA = 25 °C.

High-Frequency Crystal

Low-Frequency Crystal Oscillator

Precision Low Frequency RC Oscillator (LFRCO)

GPIO Pins

Microcontroller Peripherals

The MCU peripherals set available in Lyra 24P modules includes:

• ADC: 12-bit at 1 Msps, 16-bit at 76.9 ksps
• 16-bit and 32-bit Timers/Counters
• 24-bit Low Energy Timer for waveform generation
• 32-bit Real Time Counter
• USART (UART/SPI/SmartCards/IrDA/I2S)
• EUSART (UART/IrDA)
• I2C peripheral interfaces
• 12 Channel Peripheral Reflex System

For details on their electrical performance and to learn which GPIO ports provide access to every peripheral, consult the relevant portions of Section 4 and Section 6 in the SoC datasheet, see EFR32BG24 SoC section for datasheet link.

To learn which GPIO ports provide access to every peripheral, consult Analog Peripheral Connectivity and Digital Peripheral Connectivity..

Integration Guidelines

Antenna Characteristics

Lyra 24P Module Antenna

Typical performance curves indicate typical characterized performance under the stated conditions.

Typical Lyra 24P radiation patterns and efficiency for the integrated antenna under optimal operating conditions are plotted in the figures that follow. Antenna gain and radiation patterns have a strong dependence on the size and shape of the application PCB the module is mounted on, as well as on the proximity of any mechanical design to the antenna.

Lyra 24P USB Adapter

The Lyra 24P USB adaptor uses the 453-000145 - Lyra 24P Series - Bluetooth v5.4 PCB Module (20dBm) with integrated antenna module which has 1.82dBi antenna gain.

The Lyra 24P USB adaptor small PCB size (small ground plane) limits the radiated antenna performance. See Lyra 24P USB adaptor antenna patterns in X, Y and Z orientations for 3 channels.

Circuit (Overview and Checklist)

PCB Layout

PCB Layout on Host PCB - General

For optimal performance of the Lyra 24P:

Place the module aligned to the edge of the application PCB, as illustrated in the figures below.

• Optional on the module with the RF pin.
• Leave the antenna clearance area void of any traces, components, or copper on all layers of the application PCB if you are going to use the built-in antenna.
• Antenna clearance area is not necessary if you are using an external antenna attached to the RF pin.
• RFOUT can be left floating if not used.

Antennas external to the module, either connectorized off-the-shelf antennas or PCB trace antennas, must be well-matched to 50 Ω.

• For external antenna use cases, use a 50 Ω grounded coplanar transmission line to trace the signal from the RF pin to an external MHF4 RF connector if applicable (see Recommended Layout for Lyra 24P Using External Antenna, below).
• A general rule is to use 50 Ω transmission lines where the length of the RF trace is longer than λ/16 at the fundamental frequency, which for 2.4 GHz is approximately 3.5 mm.
• An IPEX MHF4 RF connector can be used in the host PCB for the connection to an external antenna. The use of a MHF4 connector is also recommended for conductive tests. The integrator must use a unique connector, such as a “reverse polarity SMA” or “reverse thread SMA”, if detachable antenna is offered with the host chassis. This is especially required for the FCC and ISED approvals to remain valid, and any other kind of direct connector to the antenna might require a permissive change.
• A trace length of 1.84 mm was used in the certifications host board to connect the module RF pin to the MHF4 RF connector.
• For reference, Layer 2 drawing in External Antenna Integration shows a set of parameters for a 50 Ω trace. Trace impedance should always be matched to the particular stack-up used on the host board.

Connect all ground pads directly to a solid ground plane.

Place the ground vias as close to the ground pads as possible.

Avoid plastic or any other dielectric material in contact with the antenna.

The figure below illustrates layout scenarios that will lead to severely degraded RF performance for the module.

The width of the GND plane to the sides the module will impact the efficiency of the built in antenna. To achieve optimal performance, a GND plane width of 55-60 mm is recommended. See Lyra 24P Integrated Antenna for reference.

Proximity to Human Body

Placing the module in contact with or very close to the human body will negatively impact antenna efficiency and reduce range.

Antenna Keep-Out on Host PCB

External Antenna Integration

Lyra 24P 50 Ohms RF Track Design for Connecting External Antenna with the Lyra 24P Module, 20dBm, RF Pad Variant (453-00148)

Lyra 24P module can be used with external antennas (certified by Ezurio), and requires a 50 Ohm RF trace (GCPW, that Grounded Coplanar Waveguide) to be designed to run from Lyra 24P module RFOUT (pin33) to a RF antenna connector (IPEX MHF4) on host PCB.  The 50 Ohms RF track design and length MUST be copied (as specified in this section).  Lyra 24P module GND pin32 and GND pin34 used to support GCPW 50Ohm RF trace.

Checklist for SCH

Lyra 24P External antenna connection SCH	Lyra 24P External antenna connection PCB
Fit IPEX MHF4 RF connector (20449-001E)

Lyra 24P for External antenna connection host PCB 50-Ohm RF trace schematic with MHF4 RF connector

Layer1 (RF Track and RF GND)

Layer2 (RF GND)

50-Ohm RF trace design (Layer1 and Layer2) on DVK-Lyra 24P development board 453-00148-K1 (or host PCB) for use with Lyra 24P (453-00148) module

Checklist for PCB:

• MUST use a 50-Ohm RF trace (GCPW, that is Grounded Coplanar Waveguide) from RFOUT pad (pin33) of the Lyra 24P module (453-00148) to RF antenna connector (IPEX MHF4 Receptable (MPN: 20449-001E)) on host PCB.
• To ensure regulatory compliance, MUST follow exactly the following considerations for 50-Ohms RF trace design and test verification:

• The 50-Ohms RF trace design MUST be Grounded Coplanar Waveguide (GCPW) with

  • Layer1 RF track width (W) of 20 mil and
  • Layer1 gap (S) to GND of 5 mil and where the
  • Layer1 to Layer 2 dielectric thickness (H) MUST be 57.6 mil (dielectric constant Er 4.2).
  • Further the Layer1 base copper must be 1-ounce base copper (that is 1.5 mil) plus the plating and
  • Layer1 MUST be covered by solder mask of 1.0 mil thickness (dielectric constant Er 3.5).
• The 50-Ohms RF trace design MUST follow the PCB stack-up shown in the table above. (Layer1 to Layer2 thickness MUST be identical to the Lyra 24P development board).
• The 50-Ohms RF track should be a controlled-impedance trace e.g., ±10%.
• The 50-Ohms RF trace length MUST be identical (as seen in Layer 2 drawing above) (43.3mil) to that on the Lyra 24P development board from Lyra 24P module RFOUT RF pad (pin33) to the RF connector IPEX MHF4 Receptable (MPN: 20449-001E).
• Place GND vias regularly spaced either side of 50-Ohms RF trace to form GCPW (Grounded coplanar waveguide) transmission line (as shown in Layer 2 drawing above) and use Lyra 24P module GND pin32, GND pin34.
• Use spectrum analyzer to confirm the radiated (and conducted) signal is within the certification limit.

External Antenna Integration with the Lyra 24P Module, 20dBm, RF pad variant (453-00148)

Please refer to the Lyra 24P Regulatory Information Guide for details on using Lyra 24P module with external antennas in each regulatory region. This guide is available at https://www.ezurio.com/documentation/regulatory-information-lyra-24p.

The Lyra 24P has been designed to operate with the below external antennas (with a maximum gain of 2.0dBi). The required antenna impedance is 50 ohms. See Certified Antennas. External antennas improve radiation efficiency.

Host Platform Implementation Details

Network Co-Processor (NCP) Application with UART Host

The Lyra 24P can be controlled over the UART interface as a peripheral to an external host processor. Typical power supply, programming/debug interface, and host interface connections are shown in the figure below.   For more details, see AN958: Debugging and Programming Interfaces for Custom Designs.

SoC Application

The Lyra 24P can be used in a stand-alone SoC configuration without an external host processor. Typical power supply and programming/debug interface connections are shown in the figure below.  For more details, see AN958: Debugging and Programming Interfaces for Custom Designs.

Boot

The BOOT pin is used to determine when execution of the bootloader is required. Upon reset, execution of the bootloader begins. The state of the BOOT pin is read immediately upon start-up of the bootloader. If LOW, execution of the bootloader continues, facilitating firmware update via the UART. If the BOOT pin is HIGH, the bootloader will stop execution and pass control to the main application firmware.

Reset

The Lyra 24P can be reset by pulling the RESET line low, by the internal watchdog timer, or by software command.

The reset state does not provide power saving functionality and it is not recommended as a means to conserve power.

Debug

The Lyra 24P supports hardware debugging via 4-pin JTAG or 2-pin serial-wire debug (SWD) interfaces. It is recommended to expose the debug pins in your own hardware design for firmware update and debug purposes. The table below lists the required pins for JTAG and SWD debug interfacing, which are also presented in Section Alternate Function Table.

If JTAG interfacing is enabled, the module must be power cycled to return to a SWD debug configuration if necessary.

Packet Trace Interface (PTI)

The Lyra 24P integrates a true PHY-level packet trace interface (PTI) peripheral that can capture packets non-intrusively to monitor and log device and network traffic without burdening processing resources in the module's SoC. The PTI generates two output signals that can serve as a powerful debugging tool, especially in conjunction with other hardware and software development tools available from Silicon Labs. The PTI_DATA and PTI_FRAME signals can be accessed through any GPIO on ports C and D (see FRC.DOUT and FRC.DFRAME peripheral resources in Pin Definitions.

Application Note for Surface Mount Modules

PCB Land Pattern

Dimensions for 450-00184 Lyra 24P – Bluetooth v5.4 USB Adaptor (20dBm) with Integrated Antenna (Silicon Labs EFR32BG24)

The Lyra 24P USB dongle User Guide is available on the Lyra 24 Series product page:

https://www.ezurio.com/lyra24-series

Module Label Marking

The figure below shows the module markings engraved on the RF shield.

The package marking consists of:

• P/N - Part number designation
• Model: Lyra 24P Model number designation

• QR Code: YYWWTTTTTT

  • YY – Last two digits of the assembly year.
  • WW – Two-digit workweek when the device was assembled.
  • TTTTTT – Manufacturing trace code. The first two letters are the ID of the manufacturer followed by 4 digits of trace code.

• Date code: YYWWTTTTTT

  • YY – Last two digits of the assembly year.
  • WW – Two-digit workweek when the device was assembled.
  • TTTTTT – Manufacturing trace code. The first two letters are the ID of the manufacturer followed by 4 digits of trace code.
• Certification marks such as the CE logo, FCC, and IC IDs, etc as per above image.

USB Adapter Label Marking

The package marking consists of:

• P/N - Part number designation
• Model: Lyra 24P Model number designation

• Date Code: YYWWTTTTTT

  • YY – Last two digits of the assembly year.
  • WW – Two-digit workweek when the device was assembled.
  • TTTTTT – Manufacturing trace code. The first two letters are the ID of the manufacturer followed by 4 digits of trace code.
• Certification marks such as the CE logo, FCC, and IC IDs, etc as per above image.

Tape and Reel

Lyra 24P modules are delivered to the customer in cut tape (250 pcs) or reel (1000 pcs) packaging with the dimensions below. All dimensions are given in mm unless otherwise indicated.

Recommended Stencil Aperture

Reflow Parameters/ Soldering

• Optimal solder reflow profile depends on solder paste properties and should be optimized as part of an overall process development.
• It is important to provide a solder reflow profile that matches the solder paste supplier's recommendations.
• Temperature ranges beyond that of the solder paste supplier's recommendation could result in poor solderability.
• All solder paste suppliers recommend an ideal reflow profile to give the best solderability.

Miscellaneous

Cleaning

In general, cleaning the populated modules is strongly discouraged. Residuals under the module cannot be easily removed with any cleaning process.

• Cleaning with water can lead to capillary effects where water is absorbed into the gap between the host board and the module. The combination of soldering flux residuals and encapsulated water could lead to short circuits between neighboring pads. Water could also damage any stickers or labels.

• Cleaning with alcohol or a similar organic solvent will likely flood soldering flux residuals into the RF shield, which is not accessible for post-washing inspection. The solvent could also damage any stickers or labels.

• Ultrasonic cleaning could damage the module permanently.

Rework

The Lyra 24P module can be unsoldered from the host board if the Moisture Sensitivity Level (MSL) requirements are met as described in this datasheet.

Never attempt a rework on the module itself, i.e. replacing individual components. Such actions terminate warranty coverage.

Environmental and Reliability

Environmental Requirements

Handling Conditions

The Lyra 24P module contain a highly sensitive electronic circuitry. Handling without proper ESD protection may damage the module permanently.

Moisture Sensitivity Level (MSL)

Per J-STD-020, devices rated as MSL 4 and not stored in a sealed bag with desiccant pack should be baked prior to use.

Devices are packaged in a Moisture Barrier Bag with a desiccant pack and Humidity Indicator Card (HIC). Devices that will be subjected to reflow should reference the HIC and J-STD-033 to determine if baking is required.

If baking is required, refer to J-STD-033 for bake procedure.

Required Storage Conditions

Per J-STD-033, the shelf life of devices in a Moisture Barrier Bag is 12 months at <40C and <90% room humidity (RH).

Do not store in salty air or in an environment with a high concentration of corrosive gas, such as Cl2, H2S, NH3, SO2, or NOX. Do not store in direct sunlight.

The product should not be subject to excessive mechanical shock.

Repeated Reflow Soldering

Only a single reflow soldering process is encouraged for host boards.

Reliability Tests

Climatic and Dynamic

Climatic and Dynamic Reliability Test Results for Lyra 24P Modules

Climatic and Dynamic Reliability Test Results for Lyra 24P USB Adapter

Reliability Prediction

MTBF Prediction for Lyra 24P Modules

MTBF Prediction for Lyra 24P USB Adapter

Regulatory, Qualification & Certifications

Regulatory Approvals

Please refer to the Lyra 24P Regulatory Information Guide for details on using Lyra 24P module with external antennas in each regulatory region. This guide will be available at: http://www.ezurio.com/lyra24-series.

The Lyra 24P holds current certifications in the following countries:

Maximum Regulatory Certified RF TX Power per Country - 453-00148 Lyra 24P Series - Bluetooth v5.4 PCB Module (20dBm) w/ RF Trace Pad

For shipped AT Firmware

AT firmware implements RF TX power settings per country highlighted in below table and per country sections have detailed information.

453-00148 Lyra 24P – Bluetooth v5.4 PCB Module (20dBm) with RF Trace Pad is shipped with AT firmware where the radio regulatory region “global” is set which is lowest common settings across RF TX power across certified countries.  

To switch to the specific radio regulatory region country of USA, Canada, Europe, UK, Australia, New Zealand, Japan, and South Korea, customer can use appropriate AT command for setting the radio regulatory region per country.

For Customers C Code Development

Customers developing with C Code – Full software development with Silicon Labs SDK and Toolchain, MUST implement the RF TX power settings per country and other parameters mentioned in this section.

AFH Firmware Module

1. For BLE 20dBm modules, and whenever for radio regulatory declared radio as FHSS, the Silabs AFH FW module MUST be enabled. See Silabs AFH firmware module (in Silabs BLE stack) operation description: https://docs.silabs.com/bluetooth/5.0/general/system-and-performance/adaptive-frequency-hopping
   Below is basic summary:

   1. Does spectral scanning every one second (takes about 10ms to scan 40 BLE channels) AFTER first transmission (after an advertisement is sent)
   2. If RF interference is present on a channel (above -71dBm), then that channel is NOT used and is blacklisted for at least 8 afh_scan_intervals
   3. You are allowed to use TX power above +10 dBm when AFH is enabled and at least 15 channels are available
   4. Note that high transmit power is only allowed once for each channel after a measurement on that channel occurs. In other words, if you use the same channel multiple times for transmitting within afh_scan_interval, the second and consecutive transmission will use +10 dBm. If you have a short connection interval and long afh_scan_interval, this can easily happen,
   5. Other limitations:
      “When AFH is applied, the length of the connection events (not to be confused with the connection interval) is limited to 40 ms. In other words, in every connection interval you can send packets only for 40 ms. This is usually not a problem because it takes around 2.5 ms to transmit a packet with 251B payload. However, to achieve maximum throughput with unacknowledged data transmission (see Throughput with Bluetooth Low Energy, you have to take into account this limitation. For example, if you have 100 ms connection interval, you can send packets only 40% of the time. To achieve maximum throughput, decrease your connection interval to 40 ms or lower.”
2. AFH FW module has high 20dBm mode and lower 10dBm mode (in both cases actual RF TX power is lower as per Ezurio certified tables).
3. AFH FW module uses high (20dBm) mode when at least 15 BLE channels are available.
4. AFH FW module uses low (10dBm) mode If the number of available BLE channels are less than 15. E.g. when using legacy BLE Advert (which has only 3 BLE channels namely 2402, 2440, 2480MHz), then the AFH FW module drops to 10dBm mode.
   NOTE: In both cases actual RF TX power is lower as per below Ezurio certified table.
5. Why is Antenna Gain setting used? Implemented (in AT firmware) lower RF TX power (for both 20dBm and 10dBm modes) than certified in 10dBm mode. Reason for this is the 10dBm mode TX power setting is hardcoded to 10dBm (by Silabs), so to achieve Ezurio certified TX power e.g. 7dBm for CE (which is lower than 10dBm for CE), the method of using Antenna Gain setting is used to produce the actual TX power that Ezurio certified in the 10dBm mode. Since Antenna Gain setting applies to both 10dBm mode and 20dBm mode and all countries, so it impacts RF TX power across both modes (20dBm and 10dBm modes) and countries.

Silabs BLE SDK 5.0.0.0 GA (December 14, 2022) version does NOT allow TX power setting in 10dBm mode to be modified.

Europe (CE), UK (UKCA), Australia (RCM, New Zealand (RCM) Radio RF TX power Table

20dBm mode - Europe (CE), UK (UKCA), Australia (RCM, New Zealand (RCM) Radio TX power table

10dBm mode - Europe (CE), UK (UKCA), Australia (RCM, New Zealand (RCM) Radio TX power table

USA (FCC), Canada (ISED) Radio RF TX power Table

20dBm mode - USA (FCC), Canada (ISED) Radio TX power table

10dBm mode - USA (FCC), Canada (ISED) Radio TX power table

Australia (RCM, New Zealand (RCM) Radio RF TX Power Table

Same as EU (CE).  Refer to Europe (CE), UK (UKCA), Australia (RCM, New Zealand (RCM) Radio RF TX power Table.

Japan (MIC) Radio RF TX Power Table

20dBm mode - Japan (MIC) Radio TX power table

10dBm mode - Japan (MIC) Radio TX power table

South Korea Radio RF TX Power Table

20dBm mode - South Korea TX power table

10dBm mode – South Korea Radio TX power table

Global (Lowest Common Across Certified Countries) Radio RF TX Power Table

Same as EU (CE) AND additionally BLE CH39 2480MHz turned OFF.  Refer to Europe (CE), UK (UKCA), Australia (RCM, New Zealand (RCM) Radio RF TX power Table.

Max Regulatory Certified RF TX Power per Country – 453-00145 Lyra 24P – Bluetooth v5.4 PCB Module (20dBm) w/ Integrated Antenna

For Shipped AT Firmware

AT firmware implements RF TX power settings per country highlighted below sections.

453-00145 Lyra 24P – Bluetooth v5.4 PCB Module (20dBm) with Integrated Antenna when loaded with AT firmware where the radio regulatory region “global” is set which is lowest common settings across RF TX power across certified countries. To switch to the specific radio regulatory region country of USA, Canada, Europe, UK, Australia, New Zealand, Japan and South Korea, customer can use appropriate AT command for setting the radio regulatory region per country.

For Customers C Code Development

Customers developing with C Code – Full software development with Silicon Labs SDK and Toolchain, MUST implement the maximum RF TX power settings per country and other parameters mentioned in this section.

AFH Firmware Module Description

See section AFH Firmware Module.

Europe (CE), UK (UKCA), Australia (RCM, New Zealand (RCM) Radio RF TX power Table

20dBm mode - Europe (CE), UK (UKCA), Australia (RCM, New Zealand (RCM) Radio TX power table

10dBm mode - Europe (CE), UK (UKCA), Australia (RCM, New Zealand (RCM) Radio TX power table

USA (FCC), Canada (ISED) Radio RF TX Power Table

20dBm mode - Usa (FCC), Canada (ISED) Radio TX power table

10dBm mode - USA (FCC), Canada (ISED) Radio TX power table

Japan (MIC) Radio RF TX Power Table

20dBm mode - Japan (MIC) Radio TX Power Table

10dBm mode - Japan (MIC) Radio TX power table

South Korea Radio RF TX Power Table

20dBm mode – South Korea Radio TX Power Table

10dBm mode - Japan (MIC) Radio TX power table

South Korea Radio RF TX Power Table

20dBm mode – South Korea Radio TX Power Table

10dBm mode – South Korea Radio TX power table

Global (Lowest Common across Certified Countries) Radio RF TX Power Table

Same as EU (CE).  Refer to Europe (CE), UK (UKCA), Australia (RCM, New Zealand (RCM) Radio RF TX power Table.

Max Regulatory Certified RF TX Power per Country – 453-00184 Lyra 24P – Bluetooth v5.4 USB Adaptor (20dBm) w/ Integrated Antenna

The Lyra 24P USB adaptor uses the 453-000145 - Lyra 24P Series - Bluetooth v5.4 PCB Module (20dBm) with integrated antenna module. The maximum regulatory certified TX power per country for the 453-00184 Lyra 24P – Bluetooth v5.4 USB Adaptor with Integrated Antenna is the same as the Max Regulatory Certified RF TX Power per Country – 453-00145 Lyra 24P – Bluetooth v5.4 PCB Module (20dBm) w/ Integrated Antenna.

The certifications for the Lyra 24 USB Adaptor are performed with the DCDC converter turned on only.

Max Regulatory Certified RF TX Power per Country – 453-00142 Lyra 24P – Bluetooth v5.4 PCB Module (10dBm) w/ Integrated Antenna

For Shipped AT Firmware

Ezurio AT firmware implements maximum RF TX power settings per country highlighted below.

453-00142 Lyra 24P – Bluetooth v5.4 PCB Module (10dBm) with Integrated Antenna is shipped AT firmware where the radio regulatory region “global” is set which is lowest common settings across RF TX power across certified countries.   To switch to the specific radio regulatory region country of USA, Canada, Europe, UK, Australia, New Zealand, Japan and South Korea, customer can use appropriate AT command for setting the radio regulatory region per country.

For Customers C Code Development

Customers developing with C Code – Full software development with Silicon Labs SDK and Toolchain, MUST implement the maximum RF TX power settings per country and other parameters mentioned in this section.

AFH Firmware Module Description

See section AFH Firmware Module.

Europe (CE), UK (UKCA), Australia (RCM, New Zealand (RCM) Radio RF TX Power Table

USA (FCC), Canada (ISED) Radio RF TX Power Table

Japan (MIC) Radio RF TX Power Table

South Korea Radio RF TX Power Table