Veda IF912 (Preliminary)

Scope

This document describes key hardware aspects of the Ezurio Veda™ IF912 series wireless modules which is a ultra-lower power, single chip connected MCUs with 1x1 Wi-Fi 6 dual band, Bluetooth® Low Energy 5.4, Matter and IP networking. Integrated MCU, Radio, PMU, Flash and PSRAM in 11x7mm size that targeted at Internet-of- Things (IoT) applications for stand-alone operation or to offload a host-processor.

This document is intended to assist device manufacturers and related parties with the integration of this radio into their host devices. Data in this document is drawn from several sources and includes information found in the Infineon CYW55912 Reversion C 2024-10-30 data sheet, along with other documents provided by Infineon.

Note: The information in this document is subject to change.   Please contact Ezurio to obtain the most recent version of this document.

Introduction

Overview

The Veda IF912 series wireless module is a highly integrated, small form factor Wi-Fi/Bluetooth module that is optimized for low-power mobile devices.

The Veda IF912 integrated with all WLAN and Bluetooth functionality in a small package supports a low cost and simple implementation. The radio is pre-calibrated and integrates the complete transmit/receive RF paths including bandpass filter, diplexer, switches, reference crystal oscillator, and power management units (PMU). It is available in 7x11x1.4mm solder-down LGA form factors with an RF trace pin out for both Wi-Fi and BT.  

A reference certified embedded PCB antenna or the implementation of MHF4 connector for external antennas are available on Veda IF91x DVK, please contact Ezurio for detail information. A list of certified external antennas is shown in Certified Antennas.

Ordering information is listed in Ordering Information. Please contact Ezurio Sales/FAE for further information.

General Description

MCU: 192 MHz Arm® Cortex®-CM33, runs the Wi-Fi and Networking Stacks.

Memory:

  • On-Chip memory: 2048-KB ROM and 768-KB RAM.   (No Embedded Memory variant)
  • Embedded external memory: 8M PSRAM, 8M Flash. (Embedded Memory, 8M PSRAM, 8M Flash variant)

Note: For other embedded memory size, please contact Ezurio.

Wi-Fi:

  • 1X1, IEEE 802.11a/b/g/n/ac/ax compliant.
  • Dual-band (2.4/5GHz), 20 MHz channels supporting PHY data rates up to 802.11ax (MCS11 1024-QAM 5/6).
  • Transmit (TX) power with internal PA and LNA.
  • Wi-Fi 6 release feature:
  • OFDMA uplink and downlink as STA
  • Downlink multi-user MIMO as STA
  • Individual target-wake-time (TWT)

Bluetooth®:

  • Bluetooth® 5.4 (Bluetooth® Low Energy)
  • Advertising Coding Selection
  • Encrypted Advertising Data
  • LE Generic Attribute Profile (GATT) Security Levels Characteristic
  • Bluetooth® Low Energy 5.0/5.1/5.2/5.3 features
  • LE long range
  • LE 2 Mbps
  • LE mesh
  • Advertising extensions

 Security:

  • Arm® Trustzone Cryptocell 312  
  • Life cycle management
  • Crypto key establishment and management   Crypto offloads
  • Secure boot
  • Wi-Fi and Bluetooth® independent firmware authentication  
  • Firmware encryption
  • Attestation
  • Anti-rollback prevention

This datasheet is subject to change. Please contact Ezurio for further information.

    Specification Summary

    Processor / SoC / Chipset

    WirelessInfineon AIROC™ CYW55912

    Wi-Fi

    StandardsIEEE 802.11ax, 11ac, 11ac, 11a/b/g/n, 11d/h, 11i, 11r, 11w, 11e, 11k, 11ai, 11v
    Wi-Fi FeaturesAdvanced WLAN:

    • IEEE 802.11a/b/g/n/ac/ax compliant, tri-band capable (2.4/5 GHz)
    • 1x1 MIMO providing up to 143 Mbps PHY data rate for 2.4/5 GHz (1024-QAM modulation)
    • Supports 20 MHz bandwidth with optional SGI (1024-QAM modulation)
    • On-chip power amplifiers and low-noise amplifiers for both bands
    • Support wide variety of WLAN encryption: WPA2(Personal/Enterprise), WPA3 (Personal/Enterprise with 192 bit security).
    Spatial Streams1 (1x1 MU-MIMO)
    Supported Data Rates

    Support 802.11 ax/ac/a/b/g/n 1x1 MU-MIMO.

    StandardData Rates
    802.11b (DSSS, CCK) 1, 2, 5.5, 11 Mbps
    802.11a/g (OFDM) 6, 9, 12, 18, 24, 36, 48, 54 Mbps
    802.11n (OFDM, HT20, MCS0-7)
    802.11ac (OFDM, VHT20, MCS0-8)
    802.11ax (2.4 GHz / OFDM / HE20 / MCS0-11; 2.4 GHz / OFDMA / HE20 / MCS0-11)
    802.11ax (5 GHz / OFDM / HE20 / MCS0-11; 5 GHz / OFDMA / HE20 / MCS0-11)
    image-20251010-153207.pngimage-20251010-153338.png
    Max Transmit PowerUp to +19 dBm
    Min Transmit PowerDown to +10.5 dBm
    Modulation SchemesBPSK, QPSK, CCK, 16-QAM, 64-QAM, 256-QAM, 1024-QAM (See Note)

    Bluetooth

    Standards
    • Bluetooth® 5.4 (Bluetooth® Low Energy)
    • Bluetooth® Low Energy 5.0/5.1/5.2/5.3
    Bluetooth Features

    Bluetooth 5.4:

    • Advertising Coding Selection
    • Encrypted Advertising Data
    • LE Generic Attribute Profile (GATT) Security Levels Characteristic

    Bluetooth® Low Energy 5.0/5.1/5.2/5.3:

    • LE long range
    • LE 2 Mbps
    • LE mesh
    • Advertising extensions

    Low power consumption improves battery life of IoT and embedded devices

    InterfaceHost controller interface (HCI) using a high speed UART and PCM/I2S for audio data
    Bluetooth LE ModulationGFSK @ 1, 2 Mbps
    GFSK @ 125, 500 Kbps

    Radio Details

    Features
    • Integrates the complete transmit/receive RF paths including bandpass filter, diplexer, switches, reference crystal oscillator, and power manage unit (PMU)
    • Supports dual-band (2.4/5 GHz)
    • Supports 20MHz channel bandwidth
    • Supports 1x1 WLAN/Bluetooth antenna configuration

    One buck regulator, multiple LDO regulators, and a power management unit (PMU) are integrated into the Veda IF913. All regulators are programmable via the PMU. These blocks simplify power supply design for Bluetooth and WLAN functions in embedded designs.

    Pre-CalibrationRF system tested and calibrated in production
    Sleep ClockInternal low-power oscillator accuracy is only adequate for WLAN, and not for Bluetooth®, if low power for Bluetooth®Low-Energy required.

    External 32.768 KHz sleep clock is required for Bluetooth® Low Energy to support low power mode.

    The 32.768 kHz precision oscillator which meets the requirements listed following table must be used.

    ParameterLPO ClockUnit
    Nominal input frequency32.768kHz
    Frequency accuracy±250ppm
    Duty cycle30 – 70%
    Input signal amplitude200 – 3300mV, p-p
    Signal typeSquare-wave or sine-wave-
    Input impedance> 100k
    < 5pF
    Clock jitter (during initial startup)< 10,000ppm
    Network Architecture TypeInfrastructure (client operation)

    Radio Performance

    Tx Power

    Note: Transmit power on each channel varies per individual country regulations. All values are nominal with +/-2 dBm tolerance at room temperature.
    Tolerance could be up to +/-2.5 dBm across operating temperature.

    Note: HT20/VHT20/HE20 – 20 MHz-wide channels

    802.11a  

    6 Mbps 17 dBm (50.11 mW) 
    54 Mbps 16.5 dBm (44.66 mW) 

    802.11b 

    1 Mbps 18 dBm (63.09 mW) 
    11 Mbps 18 dBm (63.09 mW) 

    802.11g 

    6 Mbps 18 dBm (63.09 mW)  
    54 Mbps 17 dBm (50.11 mW)  

    802.11n (2.4 GHz) 

    HT20; MCS0-4 

    HT20; MCS5-7 

    18 dBm (63.09 mW)  

    16 dBm (39.81 mW)  

    802.11ax (2.4 GHz) 
    HE20; MCS0-4 

    HE20; MCS5-7 

    HE20; MCS8-9 

    HE20; MCS13

    18 dBm (63.09 mW) 

    16 dBm (39.81 mW)  

    14 dBm (25,11 mW)  

    10.5 dBm (19.95 mW) 

     802.11n (5 GHz) 

    HT20; MCS0-4

    HT20; MCS5-7

    17 dBm (50.11 mW) 

    16.5 dBm (44.66 mW)  

    802.11ac (5 GHz) 

    VHT20; MCS0-4 

    VHT20; MCS5-7 

    VHT20; MCS8

    17  dBm (50.11 mW)  

    16.5  dBm (44.66 mW) 

    14 dBm (25.12 mW) 

    802.11ax (5 GHz) 
    HE20; MCS0-4 

    HE20; MCS5-7 

    HE20; MCS8-9 

    HE20; MC10-11 

    17 dBm (50.11 mW) 

    16.5 dBm (44.66 mW) 

    14 dBm (25.12 mW)  

    13 dBm (19.95 mW) 

    Bluetooth 

    LE (1 Mbps, 2 Mbps) 7 dBm (5.01 mW) , Maximum 
    LE-LR (S=2, S=8) 7 dBm (5.01 mW) , Maximum 
    RX Sensitivity

    (PER <= 10%) All values nominal, +/-2 dBm.

    802.11a:

    6 Mbps-92 dBm
    54 Mbps-75 dBm

    802.11b:

    1 Mbps-97 dBm (PER < 8%)
    11 Mbps-90 dBm (PER < 8%)

    802.11g:

    6 Mbps-94 dBm
    54 Mbps-77 dBm

    802.11n (2.4 GHz)

    6.5 Mbps (MCS0; HT20)-94 dBm
    65 Mbps (MCS7; HT20)-75 dBm
    802.11ax (2.4 GHz)
    7.3 Mbps (MCS0; HE20)

    121.9 Mbps (MCS11; HE20)

    7.3 Mbps (MCS0; HE20/RU242)

    -94 dBm

    -64 dBm

    -94 dBm

    802.11n (5 GHz)

    6.5 Mbps (MCS0; HT20)-92 dBm
    65 Mbps (MCS7; HT20)-73 dBm

    802.11ac (5 GHz)

    6.5 Mbps (MCS0; VHT20)-92 dBm
    78 Mbps (MCS8; VHT20)-70 dBm
    802.11ax (5 GHz)
    7.3 Mbps (MCS0; HE20)

    121.9 Mbps (MCS11; HE20)

    7.3 Mbps (MCS0; HE20/RU242)

    -92 dBm

    -61 dBm

    -92 dBm

    Bluetooth:

    LE-1 Mbps-96 dBm
    LE-2 Mbps-94 dBm
    LE-LR (S=2)-102 dBm
    LE-LR (S=8)-107 dBm
    Antenna Options
    2.4 GHz Frequency Bands
    • EU: 2.4 GHz to 2.483 GHz
    • FCC/ISED: 2.4 GHz to 2.473 GHz
    • UKCA: 2.4 GHz to 2.483 GHz
    • MIC: 2.4 GHz to 2.483 GHz
    • RCM: 2.4 GHz to 2.483 GHz
    5 GHz Frequency BandsEU

    • 5.15 GHz to 5.35 GHz
    • 5.47 GHz to 5.725 GHz
    • 5.725 GHz to 5.85 GHz

    FCC

    • 5.15 GHz to 5.35 GHz
    • 5.47 GHz to 5.725 GHz
    • 5.725 GHz to 5.85 GHz

    ISED

    • 5.15 GHz to 5.35 GHz
    • 5.47 GHz to 5.725 GHz
    • 5.725 GHz to 5.85 GHz

    UKCA

    • 5.15 GHz to 5.35 GHz
    • 5.47 GHz to 5.730 GHz
    • 5.725 GHz to 5.850 GHz

    MIC

    • 5.15 GHz to 5.35 GHz
    • 5.47 GHz to 5.725 GHz

    RCM

    • 5.15 GHz to 5.35 GHz
    • 5.47 GHz to 5.725 GHz
    • 5.725 GHz to 5.85 GHz
    6 GHz Frequency BandsComplete / remove as needed
    Miscellaneous

    Interfaces

    Physical Interfaces108-pin LGA package
    Network Interfaces

    Wi-Fi: SDIO 2.0 (1.8V only)

    Bluetooth: HCI with HS-UART and PCM/I2S

    Power

    Input VoltageTypical DC 3.3 V, operating range from DC 3.13V to 4.8V
    I/O Signal VoltageTypical DC 1.8 V ± 5%

    Mechanical

    Dimensions11x7x1.4mm
    WeightTBD

    Software

    OS SupportThreadX RTOS

    NetX Secure TLS 1.3

    NetX Duo (TCP/IP)

    SecurityWPA, WPA2 (Enterprise) and WPA3 (Enterprise) support for powerful encryption and authentication
    Operating Modes
    Firmware Update

    Environmental

    Operating Temperature-40° to +85°C (-40° to +185°F)
    Storage Temperature-40° to +85°C (-40° to +185°F)
    Operating Humidity<85% (non-condensing)
    Storage Humidity5 to 95% (non-condensing)
    MSL (Moisture Sensitivity Level)4
    Maximum Electrostatic DischargeConductive 8KV; Air coupled 12KV (follows EN61000-4-2)
    Lead FreeLead-free and RoHS Compliant

    Certifications

    Regulatory Compliance
    • United States (FCC)
    • EU - Member countries of European Union (ETSI)
    • Great Britain (UKCA)
    • Canada (ISED)
    • Australia/New Zealand (RCM)
    • Japan (MIC)
    Compliance Standards
    EU
    EN 300 328

    EN 301 489-1

    EN 301 489-17

    EN 301 893

    EN 62368-1:2014

    EN 300 440

    EN 303 687

    2011/65/EU (RoHS)

    FCCISED Canada
    47 CFR FCC Part 15.247

    47 CFR FCC Part 15.407

    47 CFR FCC Part 2.1091

    RSS-247

    RSS-248

    AS/NZSMIC
    AS/NZS 4268:2017ARIB STD-T66/RCR STD-33 (2.4 GHz)

    ARIB STD-T71 (5 GHz)

    Bluetooth SIGBluetooth® SIG Qualification

    TBD

    image-20251010-154412.png

    Development

    Development Kit453-00396-K1 - Development Kit, Module, Veda IF912, SIP, Dual Band, No Memory, RF Trace Pin

    Hardware Architecture

    Block Diagrams

    image-20251010-154604.png

    Note: For embedded memory variant, please connect the QSPI bus outside the SIP. See Veda IF912 Implementation Details.

    Pin-Out / Package Layout

    Pin #NameTypeVoltage Ref.Function

    Main Chip

    Pin out

    If Not Used
    1GND--Ground-GND
    2TDM1_MCKI/OVDDIOTDM1 Interface Master Clock / I2S Master Clock / PCM interfaceE2NC
    3GND--Ground-GND
    4TDM1_SCKI/OVDDIOTDM1 Interface Slave Clock / I2S Interface Clock / PCM interfaceE3NC
    5GND--Ground-GND
    6TDM1_WSI/OVDDIOTDM1 Interface Word Select / I2S Interface Word Select / PCM interfaceD3NC
    7TDM1_DOI/OVDDIOTDM1 Interface Data Out / I2S Interface Data Out / PCM interfaceF3NC
    8TDM1_DII/OVDDIOTDM1 Interface Data In / I2S Interface Data In / PCM interfaceD4NC
    9BT_DEV_WAKEIVDDIOBluetooth Device Wake-upJ3NC
    10WL_DEV_WAKEIVDDIOWLAN Device Wake-up / Programmable General purpose I/OJ2NC
    11BT_HOST_WAKEOVDDIOHost wake upF2NC
    12GND--Ground-GND
    13DIP_OUTRF-WIFI+BT RF output port 0-50 ohm terminated
    14GND--Ground-GND
    15GND--Ground-GND
    16LHL_GPIO_8I/OVDDIOMiscellaneous general purpose GPIO_8G2NC
    17LHL_GPIO_9I/OVDDIOMiscellaneous general purpose GPIO_9H1NC
    18LHL_GPIO_3I/OVDDIOMiscellaneous general purpose GPIO_3H5NC
    19LHL_GPIO_5I/OVDDIOMiscellaneous general purpose GPIO_5H3NC
    20GND--Ground-GND
    21LPO_INIVDDIO

    External sleep clock input (32.768 KHz)

    Note: Needed for Bluetooth® Low Energy to support low power mode.

    J5-
    22GND--Ground-GND
    23WL_HOST_WAKEOVDDIOWLAN HOST WAKE / Programmable General purpose I/OG10NC
    24BT_UART_TXDOVDDIOUART Serial Output. Serial data output for the HCI UART interface.F7NC
    25GND--Ground-GND
    26ABUCK_1P12

    PWR

    input

    -

    Normal 1.12V power input and 0.74V when in sleep mode.

    Please connect to the filtered ABUCK voltage. See pin-33 and pin-34.

    See Veda IF912 Implementation Details.

    B8-
    27ABUCK_1P12PWR

    input

    --
    28GND--Ground-GND
    29TDM2_MCKI/OVDDIOTDM2 Interface Master Clock / I2S Master Clock/ PCM interfaceB1NC
    30GND--Ground-GND
    31TDM2_SCKI/OVDDIOTDM2 Interface Slave Clock / I2S Interface Clock / PCM interfaceA1NC
    32GND--Ground-GND
    33ASR_VLXPWR

    output

    -

    Analog Switching Regulator (ABUCK) power stage output.

    Please connect to external L-C Filter (2.2uH+ 4.7uF) and connected to ABUCK_1P12 (pin-26; pin-27)

    See Veda IF912 Implementation Details

    A10-
    34ASR_VLXPWR

    output

    --
    35GND--GroundGND
    36GND--Ground-GND
    37VBATPWR3.3V

    Main DC supply voltage for module. Operational: VBAT is 3.0V to 4.8V

    • VBAT and VDDIO should not rise 10%–90% faster than 40 microseconds.
    • VBAT should be up before or at the same time as VDDIO. VDDIO should NOT be present first or be held high before VBAT is high.
    B10/C10/D10-
    38VBATPWR3.3V-
    39GND--Ground-GND
    40SDIO_CLKIVDDIOSDIO Clock Input / gSPI Clock InterfaceA7NC
    41GND--Ground-GND
    42SDIO_CMDI/OVDDIOSDIO Command Line/ gSPI MOSI InterfaceA6NC
    43SDIO_DATA_0I/OVDDIOSDIO Data line 0/ gSPI  MISO InterfaceB6NC
    44SDIO_DATA_1I/OVDDIOSDIO Data line 1/ gSPI interrupt InterfaceB7NC
    45SDIO_DATA_2I/OVDDIOSDIO Data line 2/ gSPI Interface

    This pin is also used for strapping option for SDIO or gSPI.

    Default pull during strapping=”H” for SDIO bus; pull it “L” during strapping for gSPI bus.

    C7NC
    46SDIO_DATA_3I/OVDDIOSDIO Data line 3/ gSPI CS InterfaceC6NC
    47GND--Ground-GND
    48SCLKI/OVDDIOSerial Clock input for embedded memory.

    For No embedded memory variant, keep this pin NC.

    -NC
    49GND--Ground-GND
    50SII/OVDDIOSerial Data Input / Serial Data Input Output 0 for embedded memory.

    For No embedded memory variant, keep this pin NC.

    -NC
    51SIO2I/OVDDIOSerial Data Input / Serial Data Input Output 2 for embedded memory.

    For No embedded memory variant, keep this pin NC.

    -NC
    52SIO1I/OVDDIOSerial Data Input / Serial Data Input Output 1 for embedded memory.

    For No embedded memory variant, keep this pin NC.

    -NC
    53HOLDBI/OVDDIOHold Input/Serial Data Input Output 3 for embedded memory.

    For No embedded memory variant, keep this pin NC.

    -NC
    54CEBIVDDIOChip Select input, active low (CE pin for embedded PSRAM)

    For No embedded memory variant, keep this pin NC.

    -NC
    55CSBIVDDIOChip Select input, active low (CS pin for embedded NOR Flash)

    For No embedded memory variant, keep this pin NC.

    -NC
    56SMIF_SPHB_DQ0I/OVDDIO
    • SMIF data line 0.
    • Connect to external NOR Flash IO0 and external PSRAM SIO[0].
    • Connect to SI (pin-50) for embedded Memory variant.
    A4NC
    57SMIF_SPHB_DQ1I/OVDDIOSMIF data line 1.

    • Connect to external NOR Flash IO1 and external PSRAM SIO[1].
    • Connect to SIO1 (pin-52) for embedded Memory variant.
    B4NC
    58GND--Ground-GND
    59VDDIO

    PWR

    input

    -1.8 V IO supply for WLAN GPIOs

    • VBAT and VDDIO should not rise 10%–90% faster than 40 microseconds.
    D6NC
    60BT_GPIO_0I/OVDDIOBluetooth® general purpose I/OF1NC
    61BT_GPIO_7I/OVDDIOBluetooth® general purpose I/OA3NC
    62BT_GPIO_16I/OVDDIOBluetooth® general purpose I/OB3NC
    63BT_GPIO_17I/OVDDIOBluetooth® general purpose I/OC3NC
    64BT_GPIO_5I/OVDDIOBluetooth® general purpose I/OD7NC
    65BT_GPIO_6I/OVDDIOBluetooth® general purpose I/OE6NC
    66BT_GPIO_3I/OVDDIOBluetooth® general purpose I/OE5NC
    67BT_GPIO_4I/OVDDIOBluetooth® general purpose I/OF5NC
    68BT_GPIO_2I/OVDDIOBluetooth® general purpose I/OE4NC
    69GND--Ground-GND
    70DMIC_DATAI/OVDDIODigital mic dataE1NC
    71GND--Ground-GND
    72LHL_GPIO_4I/OVDDIOMiscellaneous general purpose GPIO_4H4NC
    73LHL_GPIO_2I/OVDDIOMiscellaneous general purpose GPIO_2H6NC
    74LHL_GPIO_6I/OVDDIOMiscellaneous general purpose GPIO_6G1NC
    75GND--Ground-GND
    76GND--Ground-GND
    77MIC_PIVDDIOADC microphone positive inputE8NC
    78GND--Ground-GND
    79BT_UART_RXDIVDDIOUART Serial Input. Serial data input for the HCI UART interface.G6NC
    80BT_UART_RTS_NOVDDIOUART request-to-send. Active-low request-to-send signal for the HCI UART interface. Bluetooth® LED control pin.G7NC
    81BT_UART_CTS_NIVDDIOUART clear-to-send. Active-low clear-to-send signal for the HCI UART interface.F6NC
    82BT_REG_ONIVDDIOUsed by the PMU to power up or power down the internal regulators used by the Bluetooth® section. When deasserted, this pin holds the Bluetooth® section in reset. This pin has an internal 50 kΩ pull-down resistor by default. that is auto enabled/disabled by programming.C8-
    83WL_REG_ONIVDDIO

    Not used for IF913/IF912.

    This should be tied to GND on board.

    A8GND
    84~86GND--Ground-GND
    87TDM2_DII/OVDDIOTDM2 Interface Data In / I2S Interface Data In / PCM interfaceD2NC
    88TDM2_DOI/OVDDIOTDM2 Interface Data Out / I2S Interface Data Out / PCM interfaceC1NC
    89TDM2_WSI/OVDDIOTDM2 Interface Word Select / I2S Interface Word Select / PCM interfaceA2NC
    90VCCPWR-Memory 1.8V power supply--
    91GND--Ground-GND
    92SMIF_SPHB_CLKOVDDIOSMIF clock output

    • Connect to external NOR Flash SCK and external PSRAM SCK.
    • Connect to SCK (pin-48) for embedded Memory variant.
    A5GND
    93GND--Ground-GND
    94SMIF_SPHB_DQ2I/OVDDIO

    SMIF data line 2.

    • Connect to external NOR Flash IO2 and external PSRAM SIO[2].
    • Connect to SIO2 (pin-51) for embedded Memory variant.
    B5-
    95SMIF_SPHB_DQ3I/OVDDIO

    SMIF data line 3.

    • Connect to external NOR Flash IO3 and external PSRAM SIO[3].
    • Connect to HOLD (pin-53) for embedded Memory variant.
    C5NC
    96SMIF_SPHB_ CS0_NOVDDIO

    SMIF chip select0 active-low output

    • Connect to external NOR Flash CS# pin.
    • Connect to CSB (pin-55) for embedded Memory variant.
    C4NC
    97SMIF_SPHB_ CS1_NOVDDIO

    SMIF chip select1 active-low output

    • Connect to external PSRAM CE# pin.
    • Connect to CEB (pin-54) for embedded Memory variant.
    G3NC
    98~107GND--Ground-GND
    108DMIC_CLKI/OVDDIODigital mic clockD1NC
    E1~E4GND--GroundGND

    Mechanical Drawings

    Veda IF912 SIP package is 11 x 7 x 1.4 mm.

    image-20251010-160043.png

    Note:

    Dimensions are in millimeters tolerances:

    Angular: ± 0.5

    X.X: ± 0.1

    X.XX: ± 0.05

    Integration Guidelines

    Antenna Integration

    MHF4 and Embedded PCB antenna

    The Veda IF912 DVK design has two antenna connection options which are MHF4 and embedded PCB antenna. Pop on R15, users can get the RF signal out at MHF4 connector for external antenna. Pop on R16 will allow users to use the embedded PCB antenna.

    Please copy the components’ location for the RF trace from the DVK to maintain the RF performance and adopt Ezurio certification grant.

    image-20251210-163020.pngimage-20251210-163622.png

    Certified Antennas

    The Veda IF912 module was tested with antennas listed in the following table. The OEM can choose a different manufacturer’s antenna but must make sure it is of same type and that the gain is less than or equal to the antenna that is approved for use.

    ManufacturerModelEzurio
    Part Number
    TypeConnectorPeak Gain (dBi) at 2.4GHzPeak Gain (dBi) at 5GHzPeak Gain (dBi) at 6GHz
    Ezurio (formerly Laird Connectivity)FlexMIMO 6EEFD2471A3S-10MH4LPIFAMHF4L2.23.83.3
    Ezurio (formerly Laird Connectivity)FlexPIFA 6EEFB2471A3S-10MH4LPIFAMHF4L2.23.93.8
    Ezurio (formerly Laird Connectivity)Mini NanoBlade Flex 6 GHzEMF2471A3S-10MH4LPCB DipoleMHF4L2.44.45.2
    Joymax ElectronicsDipole 6ETWX-100BRSAX-2001 / TWX-100BRS3BDipoleRP-SMA24.04.0

    Host Platform Implementation Details

    Power-Up Sequence and Timing

    To maintain stable MCU and Bluetooth starting up, below power up sequency timing is required.

    • VBAT and VDDIO should not rise 10%–90% faster than 40 microseconds.
    • VBAT should be up before or at the same time as VDDIO. VDDIO should NOT be present first or be held high before VBAT is high.
    image-20251010-155141.png

    L-C filter for Buck switching regulator

    An Analog Switching Regulator (ASR or ABUCK) is built in the Veda IF912 module, the ABUCK output is brought out to pin-33 and pin-34. A L-C filter (2.2uH and 4.7uF) is required to filter out the switching noise before it feeds into ABUCK_1P12 (pin-26 and pin-27). Keep the 2.2uH and 4.7uF as close to Veda IF913 as possible to keep the current flow loop small as you can. Please refer to the Ezurio DVK for the detail placement and routing. Detail parts information is shown in below.

    • 2.2uH: 74479276222C  (Wurth Elektronik)
    • 4.7uF: GRM188C71A475KE11#  (Murata)
    image-20251010-155354.png

    Serial Memory Interface (SMIF) Connection.

    For the Veda IF912 without embedded memory variant (453-00396R), user can add external memory (NOR Flash and PSRAM) to the SMIF. Example connections are shown below. Note: VDDIO is limited to 1.8V.

    image-20251010-155450.png

    For the Veda IF912 with embedded memory variant (453-00397R), user need to connect SMIF to the embedded memory pin out (pin48/50; pin51 to pin-55). Example connections are shown below.

    image-20251010-155530.png

    SDIO and gSPI strapping configuration

    SDIO and gSPI in Veda IF912 are muxed together on the same pin out, please reference Pin Out / Package Layout .

    A strapping option pin SDIO_DATA[2] is used to configure between SDIO and gSPI. Default is in “H” state which is SDIO mode. Pull this pin to “L” will be set in gSPI mode.

    SDIO mode

    Veda IF912 provide support for SDIO V 3.0, including the new UHS-I modes:

    • DS: Default speed (DS) up to 25 MHz, including 1 and 4-bit modes (1.8 V signaling
    • HS: High-speed up to 50 MHz (1.8 V signaling)
    • SDR12: SDR up to 25 MHz (1.8 V signaling)
    • SDR25: SDR up to 50 MHz (1.8 V signaling)
    • SDR50: SDR up to 100 MHz (1.8 V signaling)
    • DDR50: DDR up to 50 MHz (1.8 V signaling)

    Notes:

    1. The UHS-1 rate SDR104, that is part of the SDIO V 3.0 specification, is not supported.
    2. Veda IF912 is backward compatible with SDIO V 2.0 host interfaces. Note however that it can only support 1.8 V signaling. It cannot support 3.3 V signaling during initialization post power cycle and in default/high speed SDIO V 2.0 modes. The host must use 1.8 V signaling.
    3. According to the SDIO specification, pull-ups in the 10 kΩ to 100 kΩ range are required on the four DATA lines and the CMD line. This requirement must be met during all operating states either through the use of external pull-up resistors or through proper programming of the SDIO host’s internal pull-ups.
    gSPI mode

    Veda IF912 has the option of using the simplified generic SPI (gSPI) interface/protocol.

    Characteristics of the gSPI mode include:

    • Up to 50-MHz operation
    • Fixed delays for responses and data from the device
    • Alignment to host gSPI frames (16 or 32 bits)
    • Up to 2-KB frame size per transfer
    • Little-endian and big-endian configurations
    • A configurable active edge for shifting
    • Packet transfer for CCM/CP Traffic/Data Exchange

    Note: gSPI mode is enabled using the strapping option pins.

    Surface Mount Conditions

    The following soldering conditions are recommended to ensure device quality.

    Recommended Stencil Aperture

    TBD

    Note: The stencil thickness is 0.12mm.

    Soldering

    Note: When soldering, the stencil thickness should be 0.12 mm.

    Convection reflow or IR/Convection reflow (one-time soldering or two-time soldering in air or nitrogen environment)

    Measuring point – IC package surface

    Temperature profile:

    image-20251010-161104.png
    • Solder paste alloy: SAC305(Sn96.5 / Ag3.0 / Cu 0.5)
    • Pre-heat temperature: 150℃ ~ 200℃; Soak time: 60 second ~ 120 second
    • Peak temperature: 235℃ ~ 250℃
    • Time above 220℃: 40 second ~ 90 second
    • Optimal cooling rate < 3℃/second
    • The oxygen concentration < 2000 ppm

    Application Note for Surface Mount Modules

    Introduction

    Shipping and Labeling

    Reflow Parameters

    Cautions when Removing the SIP from the Platform for RMA

    • Bake the platform PCBA before removing the Veda IF912 module from the platform.
    • Remove the Vedaa IF912 module by using a hot air gun. This process should be carried out by a skilled technician.

    Recommended conditions for one-side component platform:

    • Set the hot plate at 280°C.
    • Put the platform on the hot plate for 8~10 seconds.
    • Remove the device from platform.
    image-20251010-161438.png

    Recommended conditions for two-side components platform:

    • Use two hot air guns.
    • On the bottom, use a pre-heated nozzle (temp setting of 200~250°C) at a suitable distance from the platform PCB.
    • On the top, apply a remove nozzle (temp setting of 330°C). Heat until device can be removed from platform PCB.

      b7dcf926-f445-4643-be7f-89ce600576a1.pngimage-20251010-161523.png
    • Remove the residue solder under the bottom side of device. (Note: Alternate module pictured as an example)
    image-20251010-161653.pngimage-20251010-161709.png
    (Not accepted for RMA)(Accepted for RMA analysis)
    • Remove and clean the residue flux as needed.

    Precautions for Use:

    • Opening/handling/removing must be done on an anti-ESD treated workbench. All workers must also have undergone anti-ESD treatment.
    • The devices should be mounted within one year of the date of delivery.
    • The Veda IF912 modules are MSL level 4 rated.

    Environmental and Reliability

    Environmental Requirements

    Required Storage Conditions

    Prior to Opening the Dry Packing

    The following are required storage conditions prior to opening the dry packing:

    • Normal temperature: 5~40˚C
    • Normal humidity: 80% (Relative humidity) or less
    • Storage period: One year or less

    Note:  Humidity means relative humidity.

    After Opening the Dry Packing

    The following are required storage conditions after opening the dry packing (to prevent moisture absorption):

    Storage conditions for one-time soldering:

    • Temperature: 5-25°C
    • Humidity: 60% or less
    • Period: 72 hours or less after opening

    Storage conditions for two-time soldering

    Storage conditions following opening and prior to performing the 1st reflow:

    • Temperature: 5-25°C
    • Humidity: 60% or less
    • Period: A hours or less after opening

    Storage conditions following completion of the 1st reflow and prior to performing the 2nd reflow

    • Temperature: 5-25°C
    • Humidity: 60% or less
    • Period: B hours or less after completion of the 1st reflow

    Note: Should keep A+B within 72 hours.

    Temporary Storage Requirements after Opening

    The following are temporary storage requirements after opening:

    • Only re-store the devices once prior to soldering.
    • Use a dry box or place desiccant (with a blue humidity indicator) with the devices and perform dry packing again using vacuumed heat-sealing.

    The following indicate the required storage period, temperature, and humidity for this temporary storage:

    Storage temperature and humidity:

    image-20251010-160806.png

    *** - External atmosphere temperature and humidity of the dry packing

    Storage period:

    • X1+X2 – Refer to Material handling information
    • Required Storage Conditions.  Keep is X1+X2 within 72 hours.
    • Y – Keep within two weeks or less.

    Baking Conditions

    Baking conditions and processes for the module follow the J-STD-033 standard which includes the following:

    • The calculated shelf life in a sealed bag is 12 months at <40℃ and <80% relative humidity.
    • Once the packaging is opened, the SiP must be mounted (per MSL4/Moisture Sensitivity Level 4) within 72 hours at <30˚C and <60% relative humidity.

    If the SiP is not mounted within 72 hours or if, when the dry pack is opened, the humidity indicator card displays >10% humidity, then the product must be baked for 48 hours at 125 ˚C (±5 ˚C).

    Regulatory, Qualification & Certifications

    Regulatory Approvals

    TBD

    Bluetooth SIG Qualification

    TBD

    Certified Antennas

    The Veda IF912 module was tested with antennas listed in the following table. The OEM can choose a different manufacturer’s antenna but must make sure it is of same type and that the gain is less than or equal to the antenna that is approved for use.

    ManufacturerModelEzurio
    Part Number
    TypeConnector Peak Gain (dBi) @ 2.4GHzPeak Gain (dBi) @ 5GHzPeak Gain (dBi) @ 6GHz
    Ezurio (formerly Laird Connectivity)FlexMIMO 6EEFD2471A3S-10MH4LPIFAMHF4L2.23.83.3
    Ezurio (formerly Laird Connectivity)FlexPIFA 6EEFB2471A3S-10MH4LPIFAMHF4L2.23.93.8
    Ezurio (formerly Laird Connectivity)Mini NanoBlade Flex 6 GHzEMF2471A3S-10MH4LPCB DipoleMHF4L2.44.45.2
    Joymax ElectronicsDipole 6ETWX-100BRSAX-2001 / TWX-100BRS3BDipoleRP-SMA24.04.0
    Yageo (Pulse)ANT1608LL14R2460AChip Antenna2.32.73.3

    Ordering Information

    Part NumberDescription
    453-00396RModule, Veda IF912, SIP, Dual Band, No Embedded Memory, RF Trace Pin, Tape and Reel
    453-00396CModule, Veda IF912, SIP, Dual Band, No Embedded Memory, RF Trace Pin, Cut Tape
    453-00397RModule, Veda IF912, SIP, Dual Band, Embedded Memory, 8M PSRAM, 8M Flash, RF Trace Pin, Tape and Reel
    453-00397CModule, Veda IF912, SIP, Dual Band, Embedded Memory, 8M PSRAM, 8M Flash, RF Trace Pin, Cut Tape
    453-00396-K1Development Kit, Module, Veda IF912, SIP, Dual Band, External Memory, RF Trace Pin

    Legacy - Revision History

    VersionDateNotesContributorsApprover
    0.113 May 2025Preliminary releaseAndrew ChenAndy Ross
    0.222 May 2025

    Section 4:

    Update Storage humidity range to 5%~95%.

                   Operating humidity range <85%.

    Section 6:

    Update the SDIO/gSPI pin details.

    Section 7.2:

    Correct the schematic drawing on SMIF connection (Chip select pin) with external NOR and PSRAM.

    Andrew ChenAndy Ross
    0.320 June 2025Correct the pin define on pin 82-83Andrew ChenAndy Ross
    0.414 July 2025Update RF performanceAndrew ChenAndy Ross
    0.516 Sep 2025Corrected to reflect that Bluetooth does not support BR/EDRAndrew ChenAndy Ross
    0.62025/10/09Add Pin-108: DMIC_CLKAndrew ChenAndy Ross
    0.72025/12/10On section 6: Add the module pin out mapping to IFX main chip pin outAndrew ChenAndy Ross