Sterling LWB5+

Scope

This document describes key hardware aspects of the Ezurio Sterling™ LWB5+ series wireless modules providing either SDIO or USB2.0 interface for WLAN connection and UART/PCM, USB2.0/PCM for Bluetooth^® connection. This document is intended to assist device manufacturers and related parties with the integration of this radio into their host devices. Data in this document is drawn from several sources and includes information found in the Cypress CYW4373EUBGT data sheet issued in July 2020 along with other documents provided from Cypress.

Introduction

Overview

This document describes key hardware aspects of the Sterling-LWB5+. This document is intended to assist device manufacturers and related parties with the integration of this radio into their host devices. Data in this document is drawn from several sources. For full documentation on the Sterling-LWB5+, visit:

https://www.ezurio.com/lwb5+

General Description

The LWB5+ series wireless module is an integrated, small form factor 1x1 SISO 802.11 a/b/g/n/ac WLAN plus dual-mode Bluetooth^® 5.2 Low Energy module that is optimized for low-power mobile devices. The integration of all WLAN and Bluetooth functionality in a single package supports low cost and simple implementation along with flexibility for platform-specific customization.

This device is pre-calibrated and integrates the complete transmit/receive RF paths including diplexer, switches, reference crystal oscillator, and power management units (PMU). The integrated ceramic chip antenna, MHF4 RF connector, and RF trace pad are selectable from different variants.

The LWB5+ series device supports IEEE 802.11ac 1x1 SISO with data rates up to MCS9 (433.3 Mbps). An internal Wi-Fi and Bluetooth coexistence scheme provides optimized connectivity while Wi-Fi and Bluetooth are working simultaneously. The device’s low power consumption radio architecture and power management unit (PMU) proprietary power save technologies allow for extended battery life.

In addition, its dual 802.11ac and Bluetooth radio includes full digital MAC and baseband engines that handle all 802.11 CCK/OFDM® 2.4/5 GHz and Bluetooth 5.2 (Basic Rate, Enhanced Data Rate, and Bluetooth Low Energy) baseband and protocol processing.

The LWB5+ series wireless modules include three product SKUs which have different RF path and antenna types. Please contact Ezurio Sales/FAE for further information.

This datasheet is subject to change. Please contact Ezurio for further information.

Features & Benefits

The Sterling-LWB5+ device features and benefits are described in the following table.

Specification Summary

Processor / SoC / Chipset

Wi-Fi

Standards	IEEE 802.11a, 802.11b, 802.11e, 802.11g, 802.11h, 802.11i, 802.11k*, 802.11n, 802.11r, 802.11v*, 802.11ac
Interface	1-bit or 4-bit Secure Digital I/O; USB 2.0
Spatial Streams	1 (1x1 SISO) [802.11ac/n]
Channel Support	2.4 GHz: EU: 13 (3 non-overlapping) FCC/ISED: 11 (3 non-overlapping) MIC: 14 (4 non-overlapping) RCM: 13 (3 non-overlapping) 5 GHz: EU: 24 non-overlapping FCC: 25 non-overlapping ISED: 22 non-overlapping MIC: 19 non-overlapping RCM: 21 non-overlapping
Supported Data Rates	Support 802.11 ac/a/b/g/n 1x1 SISO. 802.11b (DSSS, CCK) 1, 2, 5.5, 11 Mbps 802.11a/g (OFDM) 6, 9, 12, 18, 24, 36, 48, 54 Mbps 802.11n (OFDM, HT20/HT40, MCS0-7) 802.11ac (OFDM, VHT20, MCS0-8; OFDM, VHT40/HT80, MCS0-9)
Transmit Power Note: Transmit power on each channel varies per individual country regulations. All values are nominal with +/-2 dBm tolerance at room temperature. Tolerance could be up to +/-2.5 dBm across operating temperature. Note:  HT20 – 20 MHz-wide channels HT40 – 40 MHz-wide channels HT80 – 80 MHz-wide channels	802.11a 6 Mbps: 16 dBm (40 mW) 54 Mbps: 15 dBm (31.6 mW) 802.11b 1 Mbps: 16.5 dBm (44.7 mW) 11 Mbps: 16.5 dBm (44.7 mW) 802.11g 6 Mbps: 16 dBm (40 mW) 54 Mbps: 15.5 dBm (35.5 mW) 802.11n (2.4 GHz) HT20; MCS0-7: 13.5 dBm (22.4 mW) HT40; MCS0-7: 13.5 dBm (22.4 mW) 802.11n (5 GHz) HT20; MCS0-5: 16 dBm (40 mW) HT20; MCS6-7: 15 dBm (31.6 mW) HT40; MCS0-7: 13 dBm (20 mW) 802.11ac (5 GHz) VHT20; MCS0-5: 16 dBm (40 mW) VHT20; MCS6-7: 15 dBm (31.6 mW) VHT20; MCS8: 13 dBm (20 mW) VHT40; MCS0-7: 13 dBm (20 mW) VHT40; MCS8-9: 11 dBm (12.6 mW) VHT80; MCS0-7: 12 dBm (15.8 mW) VHT80; MCS8-9: 11 dBm (12.6 mW) Bluetooth 1 Mbps (1DH5): 7 dBm max (5 mW) 2 Mbps : 3 dBm max (1.99 mW) 3 Mbps : 3 dBm max (1.99 mW) BLE (1 Mbps) : 7 dBm max (5 mW) Note: The EIRP of Bluetooth transmissions may not exceed 10 dBm. This includes the radio output power and the antenna gain used in combination with the radio.
Typical Receiver Sensitivity (PER <= 10%) Note: All values nominal, +/-3 dBm.	802.11a: 6 Mbps: -92 dBm 54 Mbps: -74 dBm 802.11b: 1 Mbps: -96 dBm (PER < 8%) 11 Mbps: -90 dBm (PER < 8%) 802.11g: 6 Mbps: -93 dBm 54 Mbps: -76 dBm 802.11n (2.4 GHz): 6.5 Mbps (MCS0; HT20): -93 dBm 65 Mbps (MCS7; HT20):  -74 dBm 13.5 Mbps (MCS0; HT40): -91 dBm 135 Mbps (MCS7; HT40):  -71 dBm 802.11n (5 GHz): 6.5 Mbps (MCS0; HT20): -91 dBm 65 Mbps (MCS7; HT20): -73 dBm 13.5Mbps (MCS0; HT40): -89 dBm 135Mbps (MCS7; HT40): -69 dBm            802.11ac (5 GHz): 6.5 Mbps (MCS0; VHT20): -90 dBm 78 Mbps (MCS8; VHT20): -67 dBm 13.5 Mbps (MCS0; VHT40): -89 dBm 180 Mbps (MCS9; VHT40): -63 dBm 29.3 Mbps (MCS0; VHT80): -85 dBm 390 Mbps (MCS9; VHT80): -60 dBm Bluetooth: 1 Mbps (1DH5): -91 dBm 2Mbps (2DH5): -93 dBm 3 Mbps (3DH5): -87 dBm Bluetooth LE: -94 dBm
Modulation Schemes	BPSK, QPSK, CCK, 16-QAM, 64-QAM, and 256-QAM.
Network Architecture Type	Infrastructure (client operation)
Wi-Fi Media	Direct Sequence-Spread Spectrum (DSSS) Complementary Code Keying (CCK) Orthogonal Frequency Divisional Multiplexing (OFDM)
Wi-Fi Multimedia	WMM Wi-Fi Multimedia - PowerSave (WMM-PS with U-APSD) WMM-Sequential Access (WMM-SA with PCF)

Bluetooth

Radio Performance

Interfaces

Power

Mechanical

Software

Environmental

Certifications

Development

Warranty

Functional Descriptions

WLAN Functional Description

The LWB5+ series wireless module is designed based on the Cypress CYW4373EUBGT 802.11ac/a/b/g/n chipset. It is optimized for high speed, reliability, and low-power embedded applications. It is integrated with dual-band WLAN (2.4/5 GHz) and Bluetooth 5.2. Its functionality includes the following:

• Improved throughput on the link due to frame aggregation, RIFS (reduced inter-frame spacing), and half guard intervals.
• Support for LDPC (Low Density Parity Check) codes.
• Improved 11n performance due to features such as 11n frame aggregation (TX A-MPDU) and low-overhead host-assisted buffering (RX A-MPDU). These techniques can improve performance and efficiency of applications involving large bulk data transfers such as file transfers or high-resolution video streaming.
• IEEE 802.11ac, 1x1 SISO with data rate up to MCS9 (433.3 Mbps).

Bluetooth Functional Description

The LWB5+ series wireless module includes a fully integrated Bluetooth baseband/radio.

Crystal Oscillator Requirement

Power-Up Sequence and Timing

Boot Mode

Description of Control Signals

• WL_REG_ON – Used by the PMU to power-up the WLAN section. When this pin is high, the regulators are enabled and the WLAN section is out of reset. When this pin is low the WLAN section is in reset. If both the BT_REG_ON and WL_REG_ON pins are low, the regulators are disabled.
• BT_REG_ON – Used by the PMU (OR-gated with WL_REG_ON) to power-up the internal regulators. If both the BT_REG_ON and WL_REG_ON pins are low, the regulators are disabled. When this pin is low and WL_REG_ON is high, the BT section is in reset.

Control Signal Timing Diagrams

WLAN=ON; Bluetooth=ON

WLAN=OFF; Bluetooth=OFF

WLAN=ON; Bluetooth=OFF

WLAN=OFF; Bluetooth=ON

WLAN Boot up Sequence for SDIO Host

Hardware Architecture

Block Diagrams

Pin-Out

Mechanical Drawings

Module dimensions of LWB5+ series wireless module is 17 x 12 x 2.1 mm.

453-00045

453-00046

453-00047

Host Interface Specifications

Host Configuration Options

LWB5+ series wireless module supports various host configurations for WLAN and Bluetooth.

SDIO Specifications

The LWB5+ series wireless module SDIO host interface pins are powered from the VIO_SD voltage supply. The SDIO electrical specifications are identical for the 1-bit SDIO and 4-bit SDIO modes.

Default Speed, High-speed Modes

SDIO timing requirements are listed below.

SDR12, SDR25, SDR50 Mode (up to 100 MHz) (1.8V)

SDIO timing requirements--- SDR12, SDR25, SDR50 modes (up to 100 MHz) (1.8V) are listed below.

SDR104 Mode (208 MHz) (1.8V)

SDIO timing requirements -- SDR104 modes (up to 208MHz) (1.8V) are listed below.

DDR50 Mode (50 MHz) (1.8V)

SDIO timing requirements – DDR50 modes (50 MHz) are listed below.

USB Specifications

USB LS Driver and Receiver Parameters

USB FS Driver and Receiver Parameters

USB HS Driver and Receiver Parameters

PCM Interface Specifications

Electrical Characteristics

Absolute Maximum Ratings

The following table summarizes the absolute maximum ratings for the LWB5+ series wireless module. Absolute maximum ratings are those values beyond which damage to the device can occur. Functional operation under these conditions, or at any other condition beyond those indicated in the operational sections of this document, is not recommended.

Recommended Operating Conditions

The following table lists the recommended operating conditions for the LWB5+ series wireless module.

DC Electrical Characteristics

The following tables list the general DC electrical characteristics over recommended operating conditions (unless otherwise specified).

General DC electrical characteristics (For 1.8V operation VDDIO)

General DC electrical characteristics (For 3.3V operation VIO_SD; VIO)

Current Consumption

WLAN current consumption on 2.4 GHz (SDIO=VDIO=3.3V)

2 GHz WLAN sleep mode current

WLAN transmitter characteristics for 5 GHz operation (SDIO=VDDIO=3.3V)

5 GHz WLAN sleep mode current

WLAN current consumption on 5 GHz (SDIO=VDDIO=3.3V)

Note²:     Final TX power values on each channel are limited by regulatory requirements

Peak PHY Calibration Current

Bluetooth and Bluetooth LE sleep current

Bluetooth current consumption, VBAT=VDDIO=3.3V

Bluetooth current consumption, VBAT=3.3V, VDDIO=1.8V

Radio Characteristics

WLAN Radio Receiver Characteristics

The following tables summarize the LWB5+ series wireless module receiver characteristics.

WLAN receiver characteristics for 2.4 GHz single chain operation

WLAN receiver characteristics for 5 GHz single chain operation

WLAN Transmitter Characteristics

WLAN transmitter characteristics for 2.4 GHz operation (SDIO=VDIO=3.3V)

Bluetooth Transmitter Characteristics

The following tables describe the basic rate transmitter performance, basic rate receiver performance, enhanced rate receiver performance, and current consumption conditions at 25°C.

Basic rate transmitter performance temperature at 25°C (3.3V)

Basic rate receiver performance at (3.3V)

Enhanced data rate receiver performance (3.3V)

BLE RF Specifications (3.3V)

Parameter	Conditions	Min	Typ	Max	Unit
Frequency range	—	2402	—	2480	MHz
Rx sensitivity3	GFSK, 30.8% PER, 1Mbps	—	-94	—	dBm
Tx power4	—	—	—	7	dBm
Δf1 average	—	225	255	275	KHz
Δf2 maximum5	—	185	220	—	KHz
ratio	—	0.8	0.95	—	—

Integration Guidelines

Integrated Antenna Characteristics

Summary of Antenna Performance

2.4GHz Radiated Pattern

5GHz Radiated Pattern

PCB Layout

The following is a list of RF layout design guidelines and recommendation when installing a Ezurio radio into your device:

• Do not run antenna cables directly above or directly below the radio.
• Do not place any parts or run any high-speed digital lines below the radio.
• If there are other radios or transmitters located on the device (such as a Bluetooth radio), place the devices as far apart from each other as possible. Also, make sure there is at least 25 dB isolation between these two antennas.
• Ensure that there is the maximum allowable spacing separating the antenna connectors on the Ezurio radio from the antenna. In addition, do not place antennas directly above or directly below the radio.
• Ezurio recommends the use of a double-shielded cable for the connection between the radio and the antenna elements.
• Be sure to put a 10 µF capacitor on each 3.3V power pin. Also, place that capacitor to the pin as close as possible to make sure the internal PMU works correctly.
• Use proper electro-static-discharge (ESD) procedures when installing the Ezurio radio module. To avoid negatively impacting Tx power and receiver sensitivity, do not cover the antennas with metallic objects or components
• The LWB5+ on-board antenna variant must be located at the edge of the host PCB surrounded by ground on three sides. A larger surround ground with X1, X2, X3 ≥ 15 millimeters has optimized performance. When X1, X2, X3 are reduced to 3 millimeters, the peak antenna gain drops to -3 dBi.

Application Note for Surface Mount Modules

Introduction

Ezurio’s surface mount modules are designed to conform to all major manufacturing guidelines. This application note is intended to provide additional guidance beyond the information that is presented in the user manual. This application note is considered a living document and will be updated as new information is presented.

The modules are designed to meet the needs of several commercial and industrial applications. They are easy to manufacture and conform to current automated manufacturing processes.

Shipping

There are 1,000 Sterling LWB5+ modules taped in a reel (and packaged in a pizza box) and two boxes per carton (2000 modules per carton). Reel, boxes, and carton are labeled with the appropriate labels.

Labeling

The following labels are located on the antistatic bag.

The following label is located on the pizza box.

The following package label is located on adjacent sides of the master carton.

Recommended Stencil Aperture

Reflow Parameters/ Soldering

Convection reflow or IR/Convection reflow (one-time soldering or two-time soldering in air or nitrogen environment)

• Measuring point – IC package surface

• Temperature profile:
  

  
• Ramp-up: 40-130˚C. Less than 2.5˚C/sec

• Pre heat: 130-180˚C 60-120 sec, 180˚C MAX

• Ramp-up: 180-220˚C. Less than 3˚C/sec

• Peak Temperature: MAX 250˚C

  • 225˚C ~ 250˚C, 30 ~ 50 sec

• Ramp-down: Maximum 6˚C/sec

Cautions when Removing the SIP from the Platform for RMA

Cautions when Removing the SIP from the Platform for RMA

• Bake the platform before removing the module from the platform.
• Remove the module by using a hot air gun. This process should be carried out by a skilled technician.

Recommended conditions for one-side component platform:

• Set the hot plate at 280°C.
• Put the platform on the hot plate for 8~10 seconds.
• Remove the device from platform.

Recommended conditions for two-side components platform:

• Use two hot air guns.
• On the bottom, use a pre-heated nozzle (temp setting of 200~250°C) at a suitable distance from the platform PCB.

• On the top, apply a remove nozzle (temp setting of 330°C). Heat until device can be removed from platform PCB.

  
• Remove the residue solder under the bottom side of device. (Note: Alternate module pictured as an example)

(Not accepted for RMA)	(Accepted for RMA analysis)

• Remove and clean the residue flux as needed.

Precautions for Use:

• Opening/handling/removing must be done on an anti-ESD treated workbench. All workers must also have undergone anti-ESD treatment.
• The devices should be mounted within one year of the date of delivery.
• The LWB5+ modules are MSL level 4 rated.

Precautions for Use

Opening/handing/removing must be done on an anti-ESD treated workbench. All workers must also have undergone anti-ESD treatment.

The devices should be mounted within one year of the date of delivery.

The LWB5+ modules are MSL level 4

The Sona IF573 modules were tested for reliability as shown in Reliability Tests.

Environmental and Reliability

Environmental Requirements

Required Storage Conditions

Prior to Opening the Dry Packing

The following are required storage conditions prior to opening the dry packing:

• Normal temperature: 5~40˚C
• Normal humidity: 80% (Relative humidity) or less
• Storage period: One year or less

After Opening the Dry Packing

The following are required storage conditions after opening the dry packing (to prevent moisture absorption):

• Storage conditions for one-time soldering:

  • Temperature: 5-25°C
  • Humidity: 60% or less
  • Period: 72 hours or less after opening

• Storage conditions for two-time soldering

  • Storage conditions following opening and prior to performing the 1st reflow:

    • Temperature: 5-25°C
    • Humidity: 60% or less
    • Period: A hours or less after opening

  • Storage conditions following completion of the 1st reflow and prior to performing the 2nd reflow

    • Temperature: 5-25°C
    • Humidity: 60% or less
    • Period: B hours or less after completion of the 1st reflow

Temporary Storage Requirements after Opening

The following are temporary storage requirements after opening:

• Only re-store the devices once prior to soldering.
• Use a dry box or place desiccant (with a blue humidity indicator) with the devices and perform dry packing again using vacuumed heat-sealing.

The following indicate the required storage period, temperature, and humidity for this temporary storage:

• Storage temperature and humidity:

  

  
  *** - External atmosphere temperature and humidity of the dry packing

• Storage period:

  • X1+X2 – Refer to After Opening the Dry Packing storage requirements.  Keep is X1+X2 within 72 hours.
  • Y – Keep within two weeks or less.

Baking Conditions

Baking conditions and processes for the module follow the J-STD-033 standard which includes the following:

• The calculated shelf life in a sealed bag is 12 months at <40℃ and <80% relative humidity.

• Once the packaging is opened, the SiP must be mounted (per MSL4/Moisture Sensitivity Level 4) within 72 hours at <30˚C and <60% relative humidity.

• If the SiP is not mounted within 72 hours or if, when the dry pack is opened, the humidity indicator card displays >10% humidity, then the product must be baked for 48 hours at 125 ˚C (±5 ˚C).

Reliability Tests

Environmental and Mechanical

Climatic and Dynamic

Reliability Prediction

Regulatory, Qualification & Certifications

Regulatory Approvals

For complete regulatory information, refer to the Sterling LWB5+ Regulatory Information document which is also available from the Sterling LWB5+ product page.

The Sterling LWB5+ holds current certifications in the following countries:

Bluetooth SIG Qualification

The Bluetooth Qualification Process promotes global product interoperability and reinforces the strength of the Bluetooth® brand and ecosystem to the benefit of all Bluetooth SIG members. The Bluetooth Qualification Process helps member companies ensure their products that incorporate Bluetooth technology comply with the Bluetooth Patent & Copyright License Agreement and the Bluetooth Trademark License Agreement (collectively, the Bluetooth License Agreement) and Bluetooth Specifications.

The Bluetooth Qualification Process is defined by the Qualification Program Reference Document (QPRD) v3.

To demonstrate that a product complies with the Bluetooth Specification(s), each member must for each of its products:

• Identify the product, the design included in the product, the Bluetooth Specifications that the design implements, and the features of each implemented specification
• Complete the Bluetooth Qualification Process by submitting the required documentation for the product under a user account belonging to your company

The Bluetooth Qualification Process consists of the phases shown below:

To complete the Qualification Process the company developing a Bluetooth End Product shall be a member of the Bluetooth SIG.  To start the application please use the following link: Apply for Adopter Membership

Scope

This guide is intended to provide guidance on the Bluetooth Qualification Process for End Products that reference multiple existing designs, that have not been modified, (refer to Section 3.2.2.1 of the Qualification Program Reference Document v3).

For a Product that includes a new Design created by combining two or more unmodified designs that have DNs or QDIDs into one of the permitted combinations in Table 3.1 of the QPRDv3, a Member must also provide the following information:

• DNs or QDIDs for Designs included in the new Design
• The desired Core Configuration of the new Design (if applicable, see Table 3.1 below)
• The active TCRL Package version used for checking the applicable Core Configuration (including transport compatibility) and evaluating test requirements

Any included Design must not implement any Layers using withdrawn specification(s).

When creating a new Design using Option 2a, the Inter-Layer Dependency (ILD) between Layers included in the Design will be checked based on the latest TCRL Package version used among the included Designs.

For the purposes of this document, it is assumed that the member is combining unmodified Core-Controller Configuration and Core-Host Configuration designs, to complete a Core-Complete Configuration.

Qualification Steps When Referencing multiple existing designs, (unmodified) – Option 2a in the QPRDv3

For this qualification option, follow these steps:

1. To start a listing, go to: https://qualification.bluetooth.com/
2. Select Start the Bluetooth Qualification Process.

3. Product Details to be entered:

   1. Project Name (this can be the product name or the Bluetooth Design name).
   2. Product Description
   3. Model Number
   4. Product Publication Date (the product publication date may not be later than 90 days after submission)
   5. Product Website (optional)
   6. Internal Visibility (this will define if the product will be visible to other users prior to publication)
   7. If you have multiple End Products to list then you can select ‘Import Multiple Products’, firstly downloading and completing the template, then by ‘Upload Product List’.  This will populate Qualification Workspace with all your products.

4. Specify the Design:

   1. Do you include any existing Design(s) in your Product? Answer Yes, I do.
   2. Enter the multiple DNs or QDIDs used in your, (for Option 2a two or more DNs or QDIDs must be referenced)
   3. Select ‘I’m finished entering DN’s
   4. Once the DNs or QDIDs are selected they will appear on the left-hand side, indicating the layers covered by the design (should show Core-Controller and Core Host Layers covered).
   5. What do you want to do next? Answer, ‘Combine unmodified Designs’.
   6. The Qualification Workspace Tool will indicate that a new Design will be created and what type of Core-Complete configuration is selected.
   7. An active TCRL will be selected for the design.
   8. Perform the Consistency Check, which should result in no inconsistencies
   9. If there are any inconsistencies these will need to be resolved before proceeding
   10. Save and go to Test Plan and Documentation

5. Test Plan and Documentation

   1. As no modifications have been made to the combined designs the tool should report the following message:
      ‘No test plan has been generated for your new Design. Test declarations and test reports do not need to be submitted. You can continue to the next step.’
   2. Save and go to Product Qualification fee

6. Product Qualification Fee:

   1. It’s important to make sure a Prepaid Product Qualification fee is available as it is required at this stage to complete the Qualification Process.
   2. Prepaid Product Qualification Fee’s will appear in the available list so select one for the listing.
   3. If one is not available select ‘Pay Product Qualification Fee’, payment can be done immediately via credit card, or you can pay via Invoice.  Payment via credit will release the number immediately, if paying via invoice the number will not be released until the invoice is paid.
   4. Once you have selected the Prepaid Qualification Fee, select ‘Save and go to Submission’

7. Submission:

   1. Some automatic checks occur to ensure all submission requirements are complete.
   2. To complete the listing any errors must be corrected
   3. Once you have confirmed all design information is correct, tick all of the three check boxes and add your name to the signature page.
   4. Now select ‘Complete the Submission’.
   5. You will be asked a final time to confirm you want to proceed with the submission, select ‘Complete the Submission’.
   6. Qualification Workspace will confirm the submission has been submitted.  The Bluetooth SIG will email confirmation once the submission has been accepted, (normally this takes 1 working day).

8. Download Product and Design Details (SDoC):

   1. You can now download a copy of the confirmed listing from the design listing page and save a copy in your Compliance Folder

For further information, please refer to the following webpage:

https://www.bluetooth.com/develop-with-bluetooth/qualification-listing/

Example Design Combinations

Ezurio Controller Subsystem + BlueZ 5.50 Host Stack (Ezurio Sterling LWB5+ based design)

Qualify More Products

If you develop further products based on the same design in the future, it is possible to add them free of charge.  The new product must not modify the existing design i.e add ICS functionality, otherwise a new design listing will be required.

To add more products to your design, select ‘Manage Submitted Products’ in the Getting Started page, Actions, Qualify More Products.  The tool will take you through the updating process.

Ordering Information

Legacy - Revision History