Sterling LWB5+ M.2

Introduction

Overview

This document describes key hardware aspects of the Ezurio LWB5+ M.2 module providing either SDIO or USB2.0 interface for WLAN connection and UART/PCM, USB2.0/PCM for Bluetooth® connection. This document is intended to assist device manufacturers and related parties with the integration of this radio into their host devices. Data in this document is drawn from several sources and includes information found in the CYPRESS CYW4373EUBGT data sheet issued in July 2020, along with other documents provided from CYPRESS.

Note that the information in this document is subject to change. Please contact Ezurio to obtain the most recent version of this document.

For full documentation on the Sterling-LWB5+, visit:

https://www.ezurio.com/lwb5+

General Description

The LWB5+ M.2 module is an integrated, M.2 2230 E-Key standard factor, 1x1 SISO with T/R diversity, 802.11 a/b/g/n/ac WLAN plus dual-mode Bluetooth 5.2 Low Energy device that is optimized for low-power mobile devices. The integration of all WLAN and Bluetooth functionality in M.2 2230 E-Key standard factor supports low cost and simple implementation along with flexibility for platform-specific customization.

This device is pre-calibrated and integrates the complete transmit/receive RF paths including diplexer, switches, reference crystal oscillator and power management units (PMU). There are two MHF4 connectors on the M.2 board, which can use certified antennas to support antenna diversity. For a list of certified antennas, see the Sterling LWB5+ Regulatory Information Guide.

The LWB5+ M.2 module supports IEEE 802.11ac (wave 1) 1x1 SISO with data rates up to MCS9 (433.3 Mbps). Internal Wi-Fi and BT coexistence scheme provides optimized throughput when Wi-Fi and BT are working simultaneously. The device’s low power consumption radio architecture and power management unit (PMU) proprietary power save technologies allow for extended battery life.

In addition, its dual 802.11 and Bluetooth radio includes full digital MAC and baseband engines that handle all 802.11 CCK/OFDM® 2.4/5GHz, and Bluetooth 5.2 (Basic Rate, Enhanced Data Rate and Bluetooth Low Energy) baseband and protocol processing.

Please contact our sales/FAE staff for further information. Ordering information is listed in Table 1.

This datasheet is subject to change. Please contact Ezurio for further information.

Features & Benefits

The Sterling-LWB5+ M.2 device features and benefits are described in the following table.

FeatureDescription
Radio Front EndIntegrates the complete transmit/receive diversity RF paths including diplexer, switches, reference crystal oscillator, and power management unit (PMU).

Supports 20/40/80MHz channel bandwidth.

WLAN/Bluetooth share one antenna.

Power ManagementOne Buck regulator, multiple LDO regulators, and a power management unit (PMU) are integrated into the CYW4373E. All regulators are programmable via the PMU. These blocks simplify power supply design for Bluetooth, and WLAN functions in embedded designs.
Pre-CalibrationRF system tested and calibrated in production
Sleep ClockAn external sleep clock of 32.768 KHz is required
Host Interface OptionsThe LWB5+ M.2 card provides two interfaces for customers to choose:

  1. SDIO 1.8V/UART, Wi-Fi section provides support for SDIO v3.0 and also is backward compatible with SDIO v2.0. Bluetooth section supports a high-speed 4-wire UART interface.
  2. USB/USB, an on-chip USB 2.0 hub provides a shared single USB connection to both Wi-Fi and Bluetooth target devices.
Advanced WLAN
  • IEEE 802.11ac compliant.
  • Support for MCS8 VHT20 in 20 MHz channels for up to 86.7 Mbps data.
  • Single-stream spatial multiplexing up to 433.3 Mbps data rate.
  • Supports 20, 40, and 80 MHz channels with optional SGI (256 QAM modulation).
  • Full IEEE 802.11a/b/g/n legacy compatibility with enhanced performance.
  • TX and RX low-density parity check (LDPC) support for improved range and power efficiency.
  • On-chip power amplifiers and low-noise amplifiers for both bands.
  • Support wide variety of WLAN encryption: WEP/TKIP/AES-CCMPs, latest WPA2/WPA3 Personal and Enterprise security standards
Advanced Bluetooth
  • Qualified for Bluetooth Core Specification 5.2 with all Bluetooth 4.2 optional features

    • QDID:
    • Declaration ID:
  • Bluetooth Class 1 or Class 2 transmitter operation.
  • Support data rate: 1 Mbps (GFSK), 2 Mbps (π/4-DQPSK), 3 Mbps (8-DPSK)
  • Supports extended synchronous connections (eSCO), for enhanced voice quality by allowing for retransmission of dropped packets.
  • Adaptive frequency hopping (AFH) for reducing radio frequency interference.
  • Interface support, host controller interface (HCI) using a highspeed UART interface (or USB interface) and PCM for audio data.
  • Low power consumption improves battery life of IoT and embedded devices.
  • Supports multiple simultaneous Advanced Audio Distribution Profiles (A2DP) for stereo sound.
  • Automatic frequency detection for standard crystal and TCXO values.

Specification Summary

Processor / SoC / Chipset

WirelessCypress CYW4373EUBGT

Wi-Fi

StandardsIEEE 802.11a, 802.11b, 802.11e, 802.11g, 802.11h, 802.11i, 802.11k*, 802.11n, 802.11r, 802.11v*, 802.11ac
Interface1-bit or 4-bit Secure Digital I/O; USB 2.0
Spatial Streams1 (1x1 SISO) [802.11ac/n]
Channel Support

2.4 GHz:

  • EU: 13 (3 non-overlapping)
  • FCC/ISED: 11 (3 non-overlapping)
  • MIC: 14 (4 non-overlapping)
  • RCM: 13 (3 non-overlapping)

5 GHz:

  • EU: 24 non-overlapping
  • FCC: 25 non-overlapping
  • ISED: 22 non-overlapping
  • MIC: 19 non-overlapping
  • RCM: 21 non-overlapping
Supported Data Rates

Support 802.11 ac/a/b/g/n 1x1 SISO.

802.11b (DSSS, CCK) 1, 2, 5.5, 11 Mbps

802.11a/g (OFDM) 6, 9, 12, 18, 24, 36, 48, 54 Mbps

802.11n (OFDM, HT20/HT40, MCS0-7)

802.11ac (OFDM, VHT20, MCS0-8; OFDM VHT40/VHT80, MCS 0-9)

Transmit Power

Note: Transmit power on each channel varies per individual country regulations. All values are nominal with +/-2 dBm tolerance at room temperature.

Tolerance could be up to +/-2.5 dBm across operating temperature.

Note: 
HT20 – 20 MHz-wide channels

HT40 – 40 MHz-wide channels
HT80 – 80 MHz-wide channels

802.11a

  • 6 Mbps: 15 dBm (31.6 mW)
  • 54 Mbps: 13 dBm (20 mW)

802.11b

  • 1 Mbps: 16 dBm (40 mW)
  • 11 Mbps: 16 dBm (40 mW)

802.11g

  • 6 Mbps: 15.5 dBm (35.5 mW)
  • 54 Mbps: 14.5 dBm (28.2 mW)

802.11n (2.4 GHz)

  • HT20; MCS0-7: 13.5 dBm (22.4 mW)
  • HT40; MCS0-7: 9.5 dBm (8.9 mW)

802.11n (5 GHz)

  • HT20; MCS0-5: 15 dBm (31.6 mW)
  • HT20; MCS6-7: 13 dBm (20 mW)
  • HT40; MCS0-7: 11 dBm (12.6 mW)

802.11ac (5 GHz)

  • VHT20; MCS0-5: 15 dBm (31.6 mW)
  • VHT20; MCS6-7: 13 dBm (20 mW)
  • VHT20; MCS8: 9.5 dBm (10 mW)
  • VHT40; MCS0-7: 11 dBm (12.6 mW)
  • VHT40; MCS8-9: 9.5 dBm (10 mW)
  • VHT80; MCS0-7: 10 dBm (10 mW)
  • VHT80; MCS8-9: 9 dBm (7.9 mW)

Bluetooth

  • 1 Mbps (1DH5): 7 dBm max (5 mW)
  • 2 Mbps : 3 dBm max (1.99 mW)
  • 3 Mbps : 3 dBm max (1.99 mW)
  • BLE (1 Mbps) : 7 dBm max (5 mW)

Note: The EIRP of Bluetooth transmissions may not exceed 10 dBm. This includes the radio output power and the antenna gain used in combination with the radio.

Typical Receiver Sensitivity

(PER <= 10%)

Note: All values nominal, +/-3 dBm.

802.11a:

  • 6 Mbps: -89 dBm
  • 54 Mbps: -73 dBm

802.11b:

  • 1 Mbps: -95 dBm (PER < 8%)
  • 11 Mbps: -88 dBm (PER < 8%)

802.11g:

  • 6 Mbps: -92 dBm
  • 54 Mbps: -75 dBm

802.11n (2.4 GHz):

  • 6.5 Mbps (MCS0; HT20): -92 dBm
  • 65 Mbps (MCS7; HT20):  -73 dBm
  • 13.5 Mbps (MCS0; HT40): -89 dBm
  • 135 Mbps (MCS7; HT40):  -70 dBm

802.11n (5 GHz):

  • 6.5 Mbps (MCS0; HT20): -89 dBm
  • 65 Mbps (MCS7; HT20): -70 dBm
  • 13.5Mbps (MCS0; HT40): -86 dBm
  • 135Mbps (MCS7; HT40): -66 dBm           

802.11ac (5 GHz):

  • 6.5 Mbps (MCS0; VHT20): -88 dBm
  • 78 Mbps (MCS8; VHT20): -66 dBm
  • 13.5 Mbps (MCS0; VHT40): -86 dBm
  • 180 Mbps (MCS9; VHT40): -62 dBm
  • 29.3 Mbps (MCS0; VHT80): -83 dBm
  • 390 Mbps (MCS9; VHT80): -59 dBm

Bluetooth:

  • 1 Mbps (1DH5): -90 dBm
  • 2Mbps (2DH5): -92 dBm
  • 3 Mbps (3DH5): -86 dBm
  • Bluetooth LE: -93 dBm
Modulation Schemes

BPSK, QPSK, CCK, 16-QAM, 64-QAM, and 256-QAM.

image-20251226-212752.png
Network Architecture TypeInfrastructure and ad-hoc
Wi-Fi Media

Direct Sequence-Spread Spectrum (DSSS)

Complementary Code Keying (CCK)

Orthogonal Frequency Divisional Multiplexing (OFDM)

Wi-Fi MultimediaWMM

Wi-Fi Multimedia - PowerSave (WMM-PS with U-APSD)

WMM-Sequential Access (WMM-SA with PCF)

Bluetooth

StandardsBluetooth 5.2
InterfaceHost Controller Interface (HCI) using high speed UART, USB 2.0
Supported Data Rates1, 2, 3 Mbps
Bluetooth LE ModulationGFSK@ 1 Mbps

Pi/4-DQPSK@ 2 Mbps

8-DPSK@ 3 Mbps

Bluetooth MediaFrequency Hopping Spread Spectrum (FHSS)

Radio Performance

2.4 GHz Frequency BandsEU: 2.4 GHz to 2.483 GHz

FCC/ISED: 2.4 GHz to 2.473 GHz

MIC: 2.4 GHz to 2.495 GHz

RCM: 2.4 GHz to 2.483 GHz

5 GHz Frequency BandsEU

5.15 GHz to 5.35 GHz (Ch 36/40/44/48/52/56/60/64)

5.47 GHz to 5.725 GHz (Ch 100/104/108/112/116/120/124/128/132/136/140)

5.725 GHz to 5.85 GHz (Ch 149/153/157/161/165)

FCC

5.15 GHz to 5.35 GHz (Ch 36/40/44/48/52/56/60/64)

5.47 GHz to 5.725 GHz (Ch 100/104/108/112/116/120/124/128/132/136/140/144

5.725 GHz to 5.85 GHz (Ch 149/153/157/161/165)

ISED

5.15 GHz to 5.35 GHz (Ch 36/40/44/48/52/56/60/64)

5.47 GHz to 5.725 GHz (Ch 100/104/108/112/116/132/136/140/144

5.725 GHz to 5.85 GHz (Ch 149/153/157/161/165)

MIC

5.15 GHz to 5.35 GHz (Ch 36/40/44/48/52/56/60/64)

5.47 GHz to 5.725 GHz (Ch 100/104/108/112/116/120/124/128/132/136/140)

RCM

5.15 GHz to 5.35 GHz (Ch 36/40/44/48/52/56/60/64)

5.47 GHz to 5.725 GHz (Ch 100/104/108/112/116/132/136/140

5.725 GHz to 5.85 GHz (Ch 149/153/157/161/165)

Interfaces

Physical InterfacesM.2 2230 E-Key standard factor
Network InterfacesWi-Fi: 1-bit or 4-bit Secure Digital I/O; USB 2.0

Bluetooth: Host Controller Interface (HCI) using high speed UART, USB 2.0

Power

Input VoltageTypical DC 3.3 V, operating range from DC 3.2V to 3.6V
I/O Signal VoltageCompliant with M.2 standard

  • For the Key-E form factor, the SDIO, PCM, and UART interfaces only support 1.8V

Mechanical

Dimensions30 mm (length) x 22 mm (width) x 3.1 mm (thickness)
Weight3g

Software

OS Support

Linux

Android

Security
  • WEP
  • WPA, and WPA2 Personal and Enterprise, and WPA3 Personal and Enterprise support for powerful encryption and authentication.
  • AES and TKIP in hardware for faster data encryption and IEEE 802.11i compatibility.
  • Reference WLAN subsystem provides Wi-Fi Protected Setup (WPS).
  • CKIP

Environmental

Operating Temperature-40° to 85°C (-40° to 185°F)
Storage Temperature-40° to 85°C (-40° to 185°F)
Operating Humidity10 to 90% (non-condensing)
Storage Humidity10 to 90% (non-condensing)
Maximum Electrostatic DischargeConductive 4KV; Air coupled 8KV follow EN61000-4-2
Lead FreeLead-free and RoHS Compliant

Certifications

Regulatory ComplianceUSA (FCC)

EU – members of European Union (ETSI)

Canada

Australia

Japan

Compliance StandardsEU

  • EN 300 328
  • EN 301 489-1
  • EN 301 489-17
  • EN 301 893
  • EN 60950-1
  • 2011/65/EU (RoHS)

FCC

  • FCC 15.247 DTS – 802.11b/g (Wi-Fi) – 2.4 GHz
  • FCC 15.407 UNII – 802.11a (Wi-Fi) – 5 GHz
  • FCC 15.247 DSS – BT 2.1

Industry Canada

  • RSS-247 – 802.11a/b/g/n (Wi-Fi) – 2.4 GHz, 5.8 GHz, 5.2 GHz, and 5.4 GHz
  • RSS-247 – BT 2.1

RCM

  • AS/NZS 4268 :2017
  • AS/NZS 4268 DFS

MIC

  • Japan ARIB STD-T66/-33/-T71
Bluetooth SIGBluetooth® SIG Qualification

Warranty

Warranty TermsOne Year Warranty

Functional Descriptions

WLAN Functional Description

The LWB5+ M.2 module is designed based on the CYPRESS CYW4373EUBGT 802.11ac/a/b/g/n chipset. It is optimized for high speed, reliable, and low-power embedded applications. It’s integrated with dual-band WLAN (2.4/5GHz) and Bluetooth 5.2. Its functionality includes:

  • Improved throughput on the link due to frame aggregation, RIFS (reduced inter-frame spacing), and half guard intervals.
  • Support for LDPC (Low Density Parity Check) codes.
  • Improved 11n performance due to features such as 11n frame aggregation (TX A-MPDU) and low-overhead host-assisted buffering (RX A-MPDU). These techniques can improve performance and efficiency of applications involving large bulk data transfers such as file transfers or high-resolution video streaming.
  • IEEE 802.11ac, 1x1 SISO with data rate up to MCS9 (433.3Mbps).

Additional functionality is listed in the following table.

FeatureDescription
WLAN MAC
  • Enhanced MAC for supporting IEEE 802.11ac features
  • Transmission and reception of aggregated MPDUs (A-MPDUs) for very high throughput (VHT)
  • Support for power management schemes, including WMM power-save, power-save multi-poll (PSMP) and multiphase PSMP operation
  • Support for immediate ACK and Block-ACK policies
  • Interframe space timing support, including RIFS
  • Support for RTS/CTS and CTS-to-self frame sequences for protecting frame exchanges
  • Back-off counters in hardware for supporting multiple priorities as specified in the WMM specification
  • Timing synchronization function (TSF), network allocation vector (NAV) maintenance, and target beacon transmission time (TBTT)
  • generation in hardware and capturing the TSF timer on an external time synchronization pulse
  • Hardware offload for AES-CCMP, legacy WPA TKIP, legacy WEP ciphers, WAPI, and support for key management
  • Support for coexistence with Bluetooth and other external radios
  • Programmable independent basic service set (IBSS) or infrastructure basic service set functionality
  • Statistics counters for MIB support
WLAN Security
  • WLAN Encryption features supported include:

    • Temporal Key Integrity Protocol (TKIP)/Wired Equivalent Privacy (WEP)
    • Advanced Encryption Standard (AES)/Counter-Mode/CBC-MAC Protocol (CCMP)
    • WLAN Authentication and Private Infrastructure (WPAI)
WLAN Channel

Channel frequency supported.

20 MHz40 MHz80 MHz
ChannelFreq. (MHz)ChannelFreq. (MHz)ChannelFreq. (MHz)ChannelFreq. (MHz)
124123651801-52422425210
224174052002-62427585290
324224452203-72432745370
424274852404-82437905410
524325252605-924221065530
624375652806-1024471225610
724426053007-1124521385690
8244764532036-4051901555775
92452100550044-485230
102457104552052-565270
112462108554060-645310
122467112556068-725350
132472116558076-805390
120560084-885430
124562092-965470
1285640100-1045510
1325660108-1125550
1365680116-1205590
1405700124-1285630
1445720132-1365670
1495745140-1445710
1535765149-1535755
1575785157-1615795
1615805
1655825

Bluetooth Functional Description

FeatureDescription
Bluetooth Interface
  • Voice interface:

    • Hardware support for continual PCM data transmission/reception without processor overhead.
    • Standard PCM clock rates from 64 kHz to 2.048 MHz with multi-slot handshake and synchronization.
    • A-law, U-law, and linear voice PCM encoding/decoding.
  • High-Speed UART interface
  • USB 2.0
Bluetooth Core functionality
  • Bluetooth 5.2 Core Spec (errata)
  • Bluetooth Class 2/Bluetooth class 1
  • WLAN and Bluetooth share same LNA and antenna
  • Digital audio interfaces with TDM interface for voice application
  • Baseband and radio BDR and EDR package type: 1 Mbps, 2 Mbps, 3 Mbps
  • Fully functional Bluetooth baseband: AFH, forward error correction, header error control, access code correction, CRC, encryption bit stream generation, and whitening.
  • Adaptive Frequency Hopping (AFH) using Packet Error Rate (PER)
  • Interlaced scan for faster connection setup
  • Simultaneous active ACL connection setup
  • Automatic ACL package type selection
  • Full master and slave piconet support
  • Scatter net support
  • SCO/eSCO links with hardware accelerated audio signal processing and hardware supported PPEC algorithm for speech quality improvement
  • All standard SCO/eSCO voice coding
  • All standard pairing, authentication, link key, and encryption operations
  • Encryption (AES) support

Bluetooth Low Energy 

(BLE) Core functionality

  • Bluetooth 5.2 Core Spec (Errata)
  • Bluetooth 4.2 Features: 

    • LE privacy 1.2
    • LE Secure Connection.
    • LE Data Length Extension
  • Bluetooth 4.0 Features:

    • Advertiser, Scanner, Initiator, Master, and Slave roles support (connects to 16 links)
    • WLAN/Bluetooth Coexistence (BCA) protocol support.
    • Shared RF with BDR/EDR
    • Encryption (AES) support.
    • Intelligent Adaptive Frequency Hopping (AFH)

Crystal Oscillator Requirement

32.768 KHz Oscillator
Frequency Accuracy200 ppm
Duty Cycle30% – 70%
Input Signal Amplitude200-3300 mV, peak-peak
Signal TypeSquare or Sine Wave
Clock Jitter<10,000 ppm

IMPORTANT: A 32.768 KHz crystal is required for the module to be functional. The module will not boot without this crystal.

Power-Up Sequence and Timing

Boot Mode

Description of Control Signals

  • WL_REG_ON – Used by the PMU to power-up the WLAN section. When this pin is high, the regulators are enabled and the WLAN section is out of reset. When this pin is low the WLAN section is in reset. If both the BT_REG_ON and WL_REG_ON pins are low, the regulators are disabled.
  • BT_REG_ON – Used by the PMU (OR-gated with WL_REG_ON) to power-up the internal regulators. If both the BT_REG_ON and WL_REG_ON pins are low, the regulators are disabled. When this pin is low and WL_REG_ON is high, the BT section is in reset.

Notes:

For both the WL_REG_ON and BT_REG_ON pins, there should be at least a 10-millisecond time delay between consecutive toggles (where both signals have been driven low). This allows time for the internal regulator to discharge. If this delay is not followed, there may be a VDDIO in-rush current on the order of 36 mA during the next PMU cold start.

The CYW4373E has an internal power-on reset (POR) circuit. The device is held in reset for a maximum of 110 milliseconds after VDDC and VDDIO have passed the POR threshold. Wait at least 150 milliseconds after VDDC and VDDIO are available before initiating SDIO accesses.

VBAT should not rise 10%–90% faster than 40 microseconds. VBAT should be up before or at the same time as VDDIO. VDDIO should NOT be present first or be held high before VBAT is high.

Control Signal Timing Diagrams

  • WLAN=ON; Bluetooth=ON

    image-20251229-152121.png
  • WLAN=OFF; Bluetooth=OFF

    image-20251229-152134.png
  • WLAN=ON; Bluetooth=OFF

    image-20251229-152147.png
  • WLAN=OFF; Bluetooth=ON

    image-20251229-152203.png
  • WLAN Boot up Sequence for SDIO Host

    image-20251229-152225.png

Hardware Architecture

Block Diagrams

image-20251226-214740.png

Pin-Out

Pin #NameTypeVoltage Ref.FunctionIf Not Used
1GND--GroundGND
23.3VPWR

I/P

3.3VDC supply voltage for module.

Operational is 3.2V to 3.6V (

--
3USB_D+I/O-Data plus of shared USB 2.0 portNC
43.3VPWR

I/P

3.3VDC supply voltage for module.

Operational is 3.2V to 3.6V

--
5USB_D-I/O-Data minus of shared USB 2.0 portNC
6LED1#O3.3VReservedNC
7GND--GroundGND
8PCM_CLKI/O1.8VPCM clock. Can be master (Output) or slave (Input)NC
9SDIO CLKI1.8VSDIO clock inputNC
10PCM_SYNCI/O1.8VPCM Sync. Can be master (Output) or slave (Input);

Or SLIM bus data.

NC
11SDIO CMDI/O1.8VSDIO command lineNC
12PCM_OUTO1.8VPCM data output.NC
13SDIO DATA0I/O1.8VSDIO data lin0NC
14PCM_INI1.8VPCM data input.NC
15SDIO DATA1I/O1.8VSDIO data lin1NC
16LED2#O3.3VReservedNC
17SDIO DATA2I/O1.8VSDIO data lin2NC
18GND--GroundGND
19SDIO DATA3I/O1.8VSDIO data lin3NC
20UART WAKE#O3.3VReserved for feature support

BT_HOST_WAKE. Output signal to wake up Host.

NC
21SDIO WAKE#O1.8VReserved for feature support

Reserved for WL_HOST_WAKE.

Output signal to wake up host.

NC
22UART_TXDO1.8VSerial data output for the HCI UART interface.NC
23SDIO RESET#--NCNC
32UART_RXDI1.8VSerial data input for the HCI UART interface.NC
33GND--GroundGND
34UART_RTSO1.8VActive-Low request-to-send signal for the HCI UART interface.NC
35PERp0--NCNC
36UART_CTSI1.8VActive-Low clear-to-send signal for the HCI UART interface.NC
37PERn0--NCNC
38VENDER DEFINED38--NCNC
39GND--GroundGND
40VENDER DEFINED40I1.8VReserved for feature support

BT_DEVICE_WAKE. Input signal from Host.

NC
41PETp0--NCNC
42VENDER DEFINED42I/O1.8VReserved for feature support

Reserved for WL_DEVICE_WAKE.

Input from Host to wake up WLAN module.

NC
43PETn0--NCNC
44COEX3--NCNC
45GND--GroundGND
46COEX2I/O1.8VReserved for feature support

WCI-2 LTE coexistence Interface 

NC
47REFCLKp0--NCNC
48COEX1I/O1.8VReserved for feature support

WCI-2 LTE coexistence Interface 

NC
49REFCLKn0--NCNC
50SUSCLKI-External Sleep Clock input (32.768KHz)

The sleep clock is always needed for using this module

--
51GND--GroundGND
52PERST0#--NCNC
53CLKREQ0#--NCNC
54W_DISABLE2#I3.3VEnables BT regulators.  Internal 100K pull-up to enable BT by default.  Ground to disable BT.NC
55PEWAKE0#--NCNC
56W_DISABLE1#I3.3 VEnables WLAN regulators.  Internal 100K pull-up to enable WLAN by default.  Ground to disable WLAN.NC
57GND--GroundGND
58I2C DATA--NCNC
59RESERVED--NCNC
60I2C CLK--NCNC
61RESERVED--NCNC
62ALERT#--NCNC
63GND--GroundGND
64RESERVED--NCNC
65RESERVED--NCNC
66UIM_SWP--NCNC
67RESERVED--NCNC
68UIM_POWER_SNK--NCNC
69GND--GroundGND
70UIM_POWER_SRC--NCNC
71RESERVED--NCNC
723.3VPWR

I/P

3.3VDC supply voltage for module.

Operational is 3.2V to 3.6V

--
73RESERVED--NCNC
743.3VPWR

I/P

3.3VDC supply voltage for module.

Operational is 3.2V to 3.6V

--
75GND--GroundGND

Mechanical Drawings

Module dimensions of LWB5+ M.2 module is 17 x 12 x 2.1 mm.

image-20251229-152501.pngimage-20251229-152524.png

Note:

The Wi-Fi MAC address is located on the product label.
The last digit of Wi-Fi MAC address is assigned to either 0, 2, 4, 6, 8, A, C, E.
The BT MAC address is the Wi-Fi MAC address plus 1.

Host Interface Specifications

SDIO Specifications

The LWB5+ M.2 module SDIO host interface pins are powered from the VIO_SD voltage supply, which is set internally at 1.8V on the M.2 module. The SDIO electrical specifications are identical for the 1-bit SDIO and 4-bit SDIO modes. 

Note: The SDIO host signals must be 1.8v at all times as defined by the M.2 standard.

Default Speed, High-speed Modes

image-20251229-145648.pngimage-20251229-145713.png

Note: Over full range of values specified in the Recommended Operating Conditions unless otherwise specified.

Timing Requirements

SymbolParameterConditionMin.Typ.Max.Unit
fPPClock FrequencyDefault Speed

High-Speed

0

0

-

-

25

50

MHz
TWLClock low timeDefault Speed

High-Speed

10

7

-

-

-

-

ns
TWHClock high timeDefault Speed

High-Speed

10

7

-

-

-

-

ns
TISUInput Setup timeDefault Speed

High-Speed

5

6

-

-

-

-

ns
TIHInput Hold timeDefault Speed

High-Speed

5

2

-

-

-

-

ns
TODLYOutput delay time

CL≦40pF (1 card)

Default Speed

High-Speed

-

-

-

-

14

14

ns
TOHOutput hold timeHigh-Speed0--ns

SDR12, SDR25, SDR50 Mode (up to 100MHz) (1.8V)

image-20251229-150054.png

Note: Over full range of values specified in the Recommended Operating Conditions unless otherwise specified.

SDIO timing requirements--- SDR12, SDR25, SDR50 modes (up to 100 MHz) (1.8V)

SymbolParameterConditionMin.Typ.Max.Unit
fPPClock FrequencySDR12/25/5025-100MHz
TISUInput setup timeSDR12/25/503---ns
TIHInput Hold timeSDR12/25/500.8--ns
TCLKClock TimeSDR12/25/5010-40ns
TCR, TCFRaise time, Fall time

TCR, TCF <2ns (max) at 100MHz

CCARD=10pF

SDR12/25/50--0.2*TCLKns
TODLYOutput delay time

CL≦30pF

SDR12/25/50--7.5ns
TOHOutput hold time

CL=15pF

SDR12/25/501.5--ns

SDR104 Mode (208 MHz) (1.8V)

image-20251229-150338.png

Note: Over full range of values specified in the Recommended Operating Conditions unless otherwise specified.

SDIO timing requirements--- SDR104 modes (up to 208MHz) (1.8V)

SymbolParameterConditionMin.Typ.Max.Unit
fPPClock FrequencySDR1040-208MHz
TISUInput setup timeSDR1041.4---ns
TIHInput Hold timeSDR1040.8--ns
TCLKClock TimeSDR1044.8--ns
TCR, TCFRaise time, Fall time

TCR, TCF <0.96ns (max) at 208MHz

CCARD=10pF

SDR104--0.2*TCLKns
TOPCard Output phaseSDR1040-10ns
TODWOutput timing pf variable data windowSDR12/25/502.88--ns

SDR50 Mode (50MHz) (1.8V)

image-20251229-150600.pngimage-20251229-150638.png

Note: In SDR50 mode, DAT[3:0] lines are samples on both edges pf the clock (not applicable for CMD line)

SDIO timing requirements – SDR50 modes (50 MHz)

SymbolParameterConditionMin.Typ.Max.Unit
Clock
TCLK

Clock time

50MHz (max) between rising edge

SDR5020----ns
TCR, TCF

Rise time, fall time

TCR, TCF <4.00ns (max) at 50MHz.

CCARD=10pF

SDR50----0.2*TCLKns
Clock Duty--SDR5045--55%
CMD Input (referenced to clock rising edge)
TISInput setup time

CCARD≦10pF (1 card)

SDR506----ns
TIHInput hold time

CCARD≦10pF (1 card)

SDR500.8----ns
CMD Output (referenced to clock rising and failing edge)
TODLY

Output delay time during data transfer mode

CL≦30pF (1 card)

SDR50----13.7ns
TOHLD

Output hold time

CL≥15pF (1 card)

SDR501.5----ns
DAT[3:0] Input (referenced to clock rising and failing edges)
TIS2X

Input setup time

CCARD≦10pF (1 card)

SDR503----ns
TIH2X

Input hold time

CCARD≦10pF (1 card)

SDR500.8----ns
DAT[3:0] Output (referenced to clock rising and failing edges)
TODLY2X (max)

Output delay time during data transfer mode

CL≦25pF (1 card)

SDR50----7.0ns
TODLY2X (min)

Output hold time

CL≥15pF (1 card))

SDR501.5----ns

USB Specification

The LWB5+ M.2 module can be powered through the USB interface and an external regulator is required to convert a 3.3V voltage for the LWB5+ M.2 module.

The LWB5+ M.2 module shares a USB2.0 interface between WLAN and Bluetooth. The data bus DP/DM as USB signaling. The following shows the WLAN/Bluetooth shared USB interface timing.

image-20251229-151402.png

PCM Interface Specifications

image-20251229-151526.png
SymbolParameterMin.Typ.Max.Unit
FBCLK--2/2.048-MHz
Duty CycleBCLK-0.40.50.6-
TBCLK rise/fall--3-ns
TDO---15ns
TDISU-20--ns
TDIHO-15--ns
TBF---15ns
image-20251229-151610.png
SymbolParameterMin.Typ.Max.Unit
FBCLK--2/2.048-MHz
Duty CycleBCLK-0.40.50.6-
TBCLK rise/fall--3-ns
TDO---30ns
TDISU-15--ns
TDIHO-10--ns
TBFSU-15--ns
TBFHO-10--ns

Electrical Characteristics

Absolute Maximum Ratings

The following table summarizes the absolute maximum ratings for the LWB5+ M.2 module. Absolute maximum ratings are those values beyond which damage to the device can occur. Functional operation under these conditions, or at any other condition beyond those indicated in the operational sections of this document, is not recommended.

Note: Maximum rating for signals follows the supply domain of the signals.

Symbol (Domain)ParameterMax RatingUnit
3V3External 3.3V power supply4.0V
StorageStorage Temperature-40 to +85°C
AntennaMaximum RF input (reference to 50-Ω input)+10dBm
ESDElectrostatic discharge tolerance2000V

Recommended Operating Conditions

The following table lists the recommended operating conditions for the LWB5+ M.2 module.

Symbol (Domain)ParameterMinTypMaxUnit
3V3External 3.3V power supply3.23.303.6V
T-ambientAmbient temperature-402585°C

DC Electrical Characteristics

The following table lists the general DC electrical characteristics over recommended operating conditions (unless otherwise specified).

SymbolParameterConditionsMinTypMaxUnit
VIHHigh Level Input Voltage1.17V
VILLow Level Input Voltage0.63V
VOHOutput high Voltage1.35V
VOLOutput low Voltage0.45V

Current Consumption

WLAN current consumption on 5 GHz (SDIO=VDIO=1.8V)

Freq.Mode/Rate [Mbps]Output Power Per Chain [dBm]Maximum Current Consumption

 (mA)

5180 MHz

5190 MHz

5210 MHz

6 Mbps17 dBm378
54 Mbps15 dBm341
HT20 MCS 017 dBm382
HT20 MCS 715 dBm352
HT40 MCS 013 dBm367
HT40 MCS 713 dBm354
VHT80 MCS 012 dBm391
VHT80 MCS 911 dBm339

5500 MHz

5510 MHz

5530 MHz

6 Mbps17 dBm378
54 Mbps15 dBm341
HT20 MCS 017 dBm382
HT20 MCS 715 dBm352
HT40 MCS 013 dBm367
HT40 MCS 713 dBm354
VHT80 MCS 012 dBm391
VHT80 MCS 911 dBm339

5825 MHz

5795 MHz

6 Mbps17 dBm378
54 Mbps15 dBm341
HT20 MCS 017 dBm382
HT20 MCS 715 dBm352
HT40 MCS 013 dBm367
HT40 MCS 013 dBm354
5775 MHzVHT80 MCS 012 dBm391
VHT80 MCS 911 dBm339

Note: Final TX power values on each channel are limited by regulatory requirements

Bluetooth current consumption, VBAT=VDDIO=3.3V

Operating ModeTxRxUnit
DH124.0724.06mA
DH329.2329.03mA
DH530.0430.02mA
2DH118.2418.19mA
2DH325.4625.12mA
2DH525.8325.77mA
3DH121.4721.43mA
3DH325.2125.26mA
3DH525.8425.79mA
LE30.3714.61mA

Bluetooth current consumption, VBAT=3.3V, VDDIO=1.8V

Operating ModeTxRxUnit
DH123.6223.57mA
DH328.5728.54mA
DH529.6229.62mA
2DH117.6517.77mA
2DH324.0624.07mA
2DH525.1125.12mA
3DH120.9120.87mA
3DH324.4224.72mA
3DH525.3425.29mA
LE30.0414.19mA

Peak PHY Calibration Current

ModeVBAT = 3.3V, VDDIO = 1.8V, TA = 25°C

VBAT, mA

VBAT = 3.3V, VDDIO = 1.8V, TA = 25°C

VIO, µA

Unassociated (2.4 GHz)768510
Associated (2.4 GHz)748560
Unassociated (5 GHz)666410
Associated (5 GHz)664390

Radio Characteristics

WLAN Radio Receiver Characteristics

The following tables summarize the LWB5+ M.2 module receiver characteristics.

WLAN receiver characteristics for 2.4 GHz

SymbolParameterMinTypMaxUnit
FrxReceive input frequency range2.4122.484GHz
SrfCCK, 1 Mbps-95dBm
CCK, 11 Mbps-88
OFDM, 6 Mbps-92
OFDM, 54 Mbps-75
HT20, MCS0-92
HT20, MCS7-73
HT40, MCS0-89
HT40, MCS7-70
RadjOFDM, 6 Mbps1638dB
OFDM, 54 Mbps-120.4
HT20, MCS01633.3
HT20, MCS7-213.7

WLAN Receiver Characteristics for 5 GHz

SymbolParameterMinTypMaxUnit
FrxReceive input frequency range5.155.825GHz
SrfOFDM, 6 Mbps-89dBm
OFDM, 54 Mbps-73
HT20, MCS0-89
HT20, MCS7-70
HT40, MCS0-86
HT40, MCS7-66
VHT20, MCS0-88
VHT20, MCS8-66
VHT40, MCS0-86
VHT40, MCS9-62
VHT80, MCS0-83
VHT80, MCS9-59

Radj

(Difference between interfering and desired signal (20 MHz apart))

OFDM, 6 Mbps1631.7dB
OFDM, 54 Mbps-113.8
OFDM, 65 Mbps-28.4

Radj.

(Difference between interfering and desired signal (40 MHz apart))

OFDM, 6 Mbps3244.7dB
OFDM, 54 Mbps1526.6
OFDM, 65 Mbps1426.8

WLAN Transmitter Characteristics

WLAN transmitter characteristics for 2.4 GHz operation (SDIO=VDIO=1.8V)

SymbolParameterConditionsMinTypMaxUnit
FtxTransmit output frequency range2.4122.484GHz
Pout11b mask compliant1-11 Mbps18dBm
11g mask compliant6-36 Mbps17.5
11g EVM compliant48-54 Mbps16.5
11n HT20 mask compliantMCS 0-515.5
11n HT20 EVM compliantMCS 6-715.5
11n HT40 mask compliantMCS 0-511.5
11n HT40 EVM compliantMCS 6-711.5
ATxTransmit power accuracy at 25 ℃-2.0+2.0dB
Freq.Mode/Rate (Mbps)Output Power (dBm)Maximum Current Consumption

 (mA)

2412 MHz 1 Mbps18 dBm390
11 Mbps18 dBm406
6 Mbps17.5 dBm406
54 Mbps16.5 dBm364
HT20 MCS 015.5 dBm361
HT20 MCS 715.5 dBm339
HT40 MCS 011.5 dBm324
HT40 MCS 711.5 dBm298

2442 MHz

 1 Mbps18 dBm390
11 Mbps18 dBm406
6 Mbps17.5 dBm406
54 Mbps16.5 dBm364
HT20 MCS 015.5 dBm361
HT20 MCS 715.5 dBm339
HT40 MCS 011.5 dBm324
HT40 MCS 711.5 dBm298

2472 MHz

 1 Mbps18 dBm390
11 Mbps18 dBm406
6 Mbps17.5 dBm406
54 Mbps16.5 dBm364
HT20 MCS 015.5 dBm361
HT20 MCS 715.5 dBm339
HT40 MCS 011.5 dBm324
HT40 MCS 711.5 dBm298

WLAN transmitter characteristics for 5 GHz operation (SDIO=VDIO=1.8V)

SymbolParameterConditionsMinTypMaxUnit
FtxTransmit output frequency range5.155.925GHz
PoutOutput powerSee Note2
11a mask compliant6-48 Mbps17dBm
11a EVM compliant54 Mbps15
11n HT20 mask compliantMCS 0-517
11n HT20 EVM compliantMCS 6-715
11n HT40 mask compliantMCS 0-513
11n HT40 EVM compliantMCS 6-713
11ac VHT20 mask compliantMCS 0-517
11ac VHT20 EVM compliantMCS 6-715
11ac VHT20 EVM compliantMCS 811.5
11ac VHT40 mask compliantMCS 0-513
11ac VHT40 EVM compliantMCS 6-713
11ac VHT40 EVM compliantMCS 8-911.5
11ac VHT80 mask compliantMCS 0-512
11ac VHT80 EVM compliantMCS 6-712
11ac VHT80 EVM compliantMCS 8-911
ATxTransmit power accuracy at 25 ℃-2.0+2.0dB

Bluetooth Transmitter Characteristics

The following describe the basic rate transmitter performance, basic rate receiver performance, enhanced rate receiver performance, and current consumption conditions at 25°C.

Basic rate transmitter performance temperature at 25°C (3.3V)

Test ParameterMinTypMaxBT Spec.Unit
Maximum RF Output PowerGFSK70 ~ +20dBm
π/4-DQPSK3
8-DPSK3
Frequency Range2.42.48352.4 ≤ f ≤ 2.4835GHz
20 dB Bandwidth919.5≤ 1000KHz
Δf1avg Maximum Modulation140155175140 < Δf1avg < 175KHz
Δf2max Minimum Modulation115135≥ 115KHz
Δf2avg/Δf1avg0.9≥ 0.80
Initial Carrier Frequency± 25± 75≤ ± 75KHz
Frequency Drift (DH1 packet)± 10± 25± 25KHz
Frequency Drift (DH3 packet)± 10± 40± 40KHz
Frequency Drift (DH5 packet)± 10± 40± 40KHz
Drift rate82020KHz/50us
Adjacent Channel PowerF ≥ ± 3 MHz-50< -40dBm
F = ± 2 MHz-46≤ -20dBm
F = ± 1 MHz-15N/AdBm

Basic rate receiver performance at 3.3V

Test ParameterMinTypMaxBT Spec.Unit
Sensitivity (1DH5)BER ≤ 0.1%-90≤ -70dBm
Maximum InputBER ≤ 0.1%-20≥ -20dBm
Interference PerformanceCo-Channel91111dB
C/I 1 MHz adjacent channel-5.500dB
C/I 2 MHz adjacent channel-38-30-30dB
C/I ≥ 3 MHz adjacent channel-46-40-40dB
C/I image channel-25.5-9-9dB
C/I 1-MHz adjacent to image channel-39-20-20dB

Enhanced data rate receiver performance (3.3V)

Test ParameterMinTypMaxBT Spec.Unit
Sensitivity (BER ≤ 0.01%)π/4-DQPSK-92≤ -70dBm
8-DPSK-86≤ -70dBm
Maximum Input (BER ≤ 0.1%)π/4-DQPSK-20≥ -20dBm
8-DPSK-20≥ -20dBm
C/I Co-Channel (BER ≤ 0.1%)π/4-DQPSK10.513≤ ±13dB
8-DPSK17.521≤ ±21dB
C/I 1 MHz adjacent Channelπ/4-DQPSK-60≤ 0dB
8-DPSK-35≤5dB
C/I 2 MHz adjacent Channelπ/4-DQPSK-38.5-30≤ -30dB
8-DPSK-37.5-25≤ -25dB
C/I ≥ 3 MHz adjacent Channelπ/4-DQPSK-47-40≤ -40dB
8-DPSK-39.5-33≤ -33dB
C/I image channelπ/4-DQPSK-24.5-7≤ -7dB
8-DPSK-170≤ 0dB
C/I 1 MHz adjacent to image channelπ/4-DQPSK-43-20≤ -20dB
8-DPSK-37-13≤ -13dB

Out-of-Band Blocking Performance

(CW)

BER ≤ 0.1%

30-2000MHz-10dBm
2-2.399GHz-27dBm
2.484-3GHz-27dBm
3-12.75GHz-10dBm

BLE RF Specifications (3.3V)

Notes:

[3] Dirty Tx is Off.

[4] The BLE TX power cannot exceed 10 dBm EIRP specification limit. The front-end losses and antenna gain/loss must be factored in so as not to exceed the limit.

[5] At least 99.9% of all Δf2 maximum frequency values recorded over 10 packets must be greater than 185 KHz.

Integration Guidelines

Mounting

The LWB5+ M.2 module connects to the host via a standard PCI EXPRESS M2 connector. The Kyocera’s (www.Kyocera-connector.com) 6411 series provide 1.8 mm, 2.3 mm and 3.2 mm connector heights and JAE’s (https://www.jae.com/en/ ) SM3 series provide 1.2 mm, 2.15 mm, 3.1 mm and 4.1 mm connector heights. 

Because the LWB5+ M.2 module is a single-side component module, we recommend the following part numbers which have 2.3 mm and 3.1 mm connector height): 

M.2 Key-E Connector Connector Height 
KYOCERA  24-6411-067-101-894E2.3 mm
JAE SM3ZS067U310AERxxxx3.1 mm

The stand-off mating to the recommend 2.3 mm connector from EMI STOP (www.EMISTOP.com) is part number F50M16-041525P1D4M and 3.1mm from JAE (https://www.jae.com/en/ ) is part number SM3ZS067U310-NUT1-Rxxxx.

M.2 Key-E Connector Stand-off 
KYOCERA  24-6411-067-101-894EEMI STOP F50M16-041525P1D4M
JAE SM3ZS067U310AERxxxxJAE SM3ZS067U310-NUT1-Rxxxx

PCB Layout

The following is a list of RF layout design guidelines and recommendation when installing a Ezurio radio into your device.

  • Do not run antenna cables directly above or directly below the radio.
  • Do not place any parts or run any high-speed digital lines below the radio.
  • If there are other radios or transmitters located on the device (such as a Bluetooth radio), place the devices as far apart from each other as possible. Also, make sure there is at least 25 dB isolation between these two antennas.
  • Ensure that there is the maximum allowable spacing separating the antenna connectors on the Ezurio radio from the antenna. In addition, do not place antennas directly above or directly below the radio.
  • Ezurio recommends the use of a double-shielded cable for the connection between the radio and the antenna elements.
  • Be sure to put a 10uF capacitor on EACH 3.3V power pin. Also, place that capacitor to the pin as close as possible to make sure the internal PMU working correctly.
  • Use proper electro-static-discharge (ESD) procedures when installing the Ezurio radio module.
  • To avoid negatively impacting Tx power and receiver sensitivity, do not cover the antennas with metallic objects or components.

PCB Layout on Host PCB - General

image-20251229-153103.pngimage-20251229-153115.pngimage-20251229-153136.pngimage-20251229-153157.png

Shipping and Labeling

Shipping

image-20251229-153856.pngimage-20251229-153942.pngimage-20251229-154025.png

Labeling

The following label is placed on the bag and the inner box.

image-20251229-154056.png

The following label is located on the adjacent sides of the master carton.

image-20251229-154123.png

Environmental and Reliability

Environmental Requirements

Required Storage Conditions

Prior to Opening the Dry Packing

The following are required storage conditions prior to opening the dry packing:

  • Normal temperature: 5~40˚C
  • Normal humidity: 80% (Relative humidity) or less
  • Storage period: One year or less

Note: Humidity means Relative Humidity.

After Opening the Dry Packing

The following are required storage conditions after opening the dry packing (to prevent moisture absorption):

  • Storage conditions for one-time soldering:

    • Temperature: 5-25°C
    • Humidity: 60% or less
    • Period: 72 hours or less after opening
  • Storage conditions for two-time soldering

    • Storage conditions following opening and prior to performing the 1st reflow:

      • Temperature: 5-25°C
      • Humidity: 60% or less
      • Period: A hours or less after opening
    • Storage conditions following completion of the 1st reflow and prior to performing the 2nd reflow

      • Temperature: 5-25°C
      • Humidity: 60% or less
      • Period: B hours or less after completion of the 1st reflow

Note: Should keep A+B within 72 hours.

Precautions for Use
  • Opening/handing/removing must be done on an anti-ESD treated workbench.
    All workers must also have undergone anti-ESD treatment.
  • The devices should be mounted within one year of the date of delivery.

Regulatory, Qualification & Certifications

Regulatory Approvals

Note:  For complete regulatory information, refer to the Sterling LWB5+ Regulatory Information document which is also available from the Sterling LWB5+ product page.

The Sterling LWB5+ holds current certifications in the following countries:

Country/RegionRegulatory ID
USA (FCC)SQG-LWB5PLUS
EUN/A
Canada (ISED)3147A-LWB5PLUS
Japan (MIC)201-200402
AustraliaN/A
New ZealandN/A

Bluetooth SIG Qualification

The Bluetooth Qualification Process promotes global product interoperability and reinforces the strength of the Bluetooth® brand and ecosystem to the benefit of all Bluetooth SIG members. The Bluetooth Qualification Process helps member companies ensure their products that incorporate Bluetooth technology comply with the Bluetooth Patent & Copyright License Agreement and the Bluetooth Trademark License Agreement (collectively, the Bluetooth License Agreement) and Bluetooth Specifications.

The Bluetooth Qualification Process is defined by the Qualification Program Reference Document (QPRD) v3.

To demonstrate that a product complies with the Bluetooth Specification(s), each member must for each of its products:

  • Identify the product, the design included in the product, the Bluetooth Specifications that the design implements, and the features of each implemented specification
  • Complete the Bluetooth Qualification Process by submitting the required documentation for the product under a user account belonging to your company

The Bluetooth Qualification Process consists of the phases shown below:

image-20250916-191649.png

To complete the Qualification Process the company developing a Bluetooth End Product shall be a member of the Bluetooth SIG.  To start the application please use the following link: Apply for Adopter Membership

Scope

This guide is intended to provide guidance on the Bluetooth Qualification Process for End Products that reference multiple existing designs, that have not been modified, (refer to Section 3.2.2.1 of the Qualification Program Reference Document v3).

For a Product that includes a new Design created by combining two or more unmodified designs that have DNs or QDIDs into one of the permitted combinations in Table 3.1 of the QPRDv3, a Member must also provide the following information:

  • DNs or QDIDs for Designs included in the new Design
  • The desired Core Configuration of the new Design (if applicable, see Table 3.1 below)
  • The active TCRL Package version used for checking the applicable Core Configuration (including transport compatibility) and evaluating test requirements

Any included Design must not implement any Layers using withdrawn specification(s).

When creating a new Design using Option 2a, the Inter-Layer Dependency (ILD) between Layers included in the Design will be checked based on the latest TCRL Package version used among the included Designs.

For the purposes of this document, it is assumed that the member is combining unmodified Core-Controller Configuration and Core-Host Configuration designs, to complete a Core-Complete Configuration.

Qualification Steps When Referencing multiple existing designs, (unmodified) – Option 2a in the QPRDv3

For this qualification option, follow these steps:

  1. To start a listing, go to: https://qualification.bluetooth.com/
  2. Select Start the Bluetooth Qualification Process.
  3. Product Details to be entered:

    1. Project Name (this can be the product name or the Bluetooth Design name).
    2. Product Description
    3. Model Number
    4. Product Publication Date (the product publication date may not be later than 90 days after submission)
    5. Product Website (optional)
    6. Internal Visibility (this will define if the product will be visible to other users prior to publication)
    7. If you have multiple End Products to list then you can select ‘Import Multiple Products’, firstly downloading and completing the template, then by ‘Upload Product List’.  This will populate Qualification Workspace with all your products.
  4. Specify the Design:

    1. Do you include any existing Design(s) in your Product? Answer Yes, I do.
    2. Enter the multiple DNs or QDIDs used in your, (for Option 2a two or more DNs or QDIDs must be referenced)
    3. Select ‘I’m finished entering DN’s
    4. Once the DNs or QDIDs are selected they will appear on the left-hand side, indicating the layers covered by the design (should show Core-Controller and Core Host Layers covered).
    5. What do you want to do next? Answer, ‘Combine unmodified Designs’.
    6. The Qualification Workspace Tool will indicate that a new Design will be created and what type of Core-Complete configuration is selected.
    7. An active TCRL will be selected for the design.
    8. Perform the Consistency Check, which should result in no inconsistencies
    9. If there are any inconsistencies these will need to be resolved before proceeding
    10. Save and go to Test Plan and Documentation
  5. Test Plan and Documentation

    1. As no modifications have been made to the combined designs the tool should report the following message:
      ‘No test plan has been generated for your new Design. Test declarations and test reports do not need to be submitted. You can continue to the next step.’
    2. Save and go to Product Qualification fee
  6. Product Qualification Fee:

    1. It’s important to make sure a Prepaid Product Qualification fee is available as it is required at this stage to complete the Qualification Process.
    2. Prepaid Product Qualification Fee’s will appear in the available list so select one for the listing.
    3. If one is not available select ‘Pay Product Qualification Fee’, payment can be done immediately via credit card, or you can pay via Invoice.  Payment via credit will release the number immediately, if paying via invoice the number will not be released until the invoice is paid.
    4. Once you have selected the Prepaid Qualification Fee, select ‘Save and go to Submission’
  7. Submission:

    1. Some automatic checks occur to ensure all submission requirements are complete.
    2. To complete the listing any errors must be corrected
    3. Once you have confirmed all design information is correct, tick all of the three check boxes and add your name to the signature page.
    4. Now select ‘Complete the Submission’.
    5. You will be asked a final time to confirm you want to proceed with the submission, select ‘Complete the Submission’.
    6. Qualification Workspace will confirm the submission has been submitted.  The Bluetooth SIG will email confirmation once the submission has been accepted, (normally this takes 1 working day).
  8. Download Product and Design Details (SDoC):

    1. You can now download a copy of the confirmed listing from the design listing page and save a copy in your Compliance Folder

For further information, please refer to the following webpage:

https://www.bluetooth.com/develop-with-bluetooth/qualification-listing/

Example Design Combinations

Ezurio Controller Subsystem + BlueZ 5.50 Host Stack (Ezurio Sterling LWB5+ based design)

Design NameOwnerDeclaration IDQD IDLink to listing on the SIG website
Sterling LWB5+EzurioD050382159315https://qualification.bluetooth.com/ListingDetails/119009
BlueZ 5.50 Host StackEzurioD046330138224https://qualification.bluetooth.com/ListingDetails/93911

Qualify More Products

If you develop further products based on the same design in the future, it is possible to add them free of charge.  The new product must not modify the existing design i.e add ICS functionality, otherwise a new design listing will be required.

To add more products to your design, select ‘Manage Submitted Products’ in the Getting Started page, Actions, Qualify More Products.  The tool will take you through the updating process.

Ordering Information

Order ModelDescription
453-00048802.11ac + Bluetooth 5.2 LWB5+ M.2 Module, SDIO (WLAN) / UART (Bluetooth)
453-00049802.11ac + Bluetooth 5.2 LWB5+ M.2 Module, USB (WLAN) / USB (Bluetooth)
453-00048-K1Development Kit for 1x1 802.11ac + Bluetooth 5.2 SDIO/UART M.2 Module
453-00049-K1Development Kit for 1x1 802.11ac + Bluetooth 5.2 USB/USB M.2 Module

Legacy - Revision History

VersionDateNotesContributor(s)Approver
1.007 Dec 2020Initial versionAndrew ChenJay White
1.101 Feb 2021Updated Bluetooth v5.0 to v5.2Sue WhiteJonathan Kaye
1.203 Mar 2021Added two Bluetooth current consumption tablesMaggie TengJonathan Kaye
1.311 Aug 2021Added Peak PHY Calibration Current table (Table 18)

Added Power-Up Sequence and Timing Requirements

Andrew ChenAndy Ross
1.427 Oct 2022Added note on maximum EIRP for Bluetooth in Specifications.Dave Drogowski

Connie Lin

Andy Ross
1.51 Feb 2023Fixed pin 21 in Table 28 to “output”Chris LaplanteAndrew Chen
1.617 Feb 2023Added updated Terms and Conditions.Dave DrogowskiElaine Baxter
1.730 May 2023Added support for latest WPA2/WPA3 Enterprise security standards.Dave DrogowskiAndy Ross
1.89 Sept 2023Added links to Regulatory Information Guide.Dave DrogowskiSkofiar Kamberi
1.99 Jan 2024Added 10 Crystal Oscillator RequirementDave DrogowskiAndy Ross
2.031 Jan 2024Fixed frequency value for Channel 7 in Table 4: WLAN functionsJacky KuoAndy Ross
2.13 Apr 2024Added full support for WPA2/WPA3 EnterpriseBob MonroeAndy Ross
2.21 Nov 2024Updated Bluetooth SIG Qualification.Dave DrogowskiJonathan Kaye
2.33 Feb 2025Updated pin 54 and pin 56 in Table 28Jacky KuoDave Drogowski
3.011 Mar 2025Ezurio rebranding.
Update pin 20 to 3.3V
Dave Drogowski

Alex Mohr

Andrew Chen