Introduction
Overview
This document describes key hardware aspects of the Ezurio LWB5+ M.2 module providing either SDIO or USB2.0 interface for WLAN connection and UART/PCM, USB2.0/PCM for Bluetooth® connection. This document is intended to assist device manufacturers and related parties with the integration of this radio into their host devices. Data in this document is drawn from several sources and includes information found in the CYPRESS CYW4373EUBGT data sheet issued in July 2020, along with other documents provided from CYPRESS.
Note that the information in this document is subject to change. Please contact Ezurio to obtain the most recent version of this document.
For full documentation on the Sterling-LWB5+, visit:
General Description
The LWB5+ M.2 module is an integrated, M.2 2230 E-Key standard factor, 1x1 SISO with T/R diversity, 802.11 a/b/g/n/ac WLAN plus dual-mode Bluetooth 5.2 Low Energy device that is optimized for low-power mobile devices. The integration of all WLAN and Bluetooth functionality in M.2 2230 E-Key standard factor supports low cost and simple implementation along with flexibility for platform-specific customization.
This device is pre-calibrated and integrates the complete transmit/receive RF paths including diplexer, switches, reference crystal oscillator and power management units (PMU). There are two MHF4 connectors on the M.2 board, which can use certified antennas to support antenna diversity. For a list of certified antennas, see the Sterling LWB5+ Regulatory Information Guide.
The LWB5+ M.2 module supports IEEE 802.11ac (wave 1) 1x1 SISO with data rates up to MCS9 (433.3 Mbps). Internal Wi-Fi and BT coexistence scheme provides optimized throughput when Wi-Fi and BT are working simultaneously. The device’s low power consumption radio architecture and power management unit (PMU) proprietary power save technologies allow for extended battery life.
In addition, its dual 802.11 and Bluetooth radio includes full digital MAC and baseband engines that handle all 802.11 CCK/OFDM® 2.4/5GHz, and Bluetooth 5.2 (Basic Rate, Enhanced Data Rate and Bluetooth Low Energy) baseband and protocol processing.
Please contact our sales/FAE staff for further information. Ordering information is listed in Table 1.
This datasheet is subject to change. Please contact Ezurio for further information.
Features & Benefits
The Sterling-LWB5+ M.2 device features and benefits are described in the following table.
| Feature | Description |
|---|---|
| Radio Front End | Integrates the complete transmit/receive diversity RF paths including diplexer, switches, reference crystal oscillator, and power management unit (PMU). Supports 20/40/80MHz channel bandwidth. WLAN/Bluetooth share one antenna. |
| Power Management | One Buck regulator, multiple LDO regulators, and a power management unit (PMU) are integrated into the CYW4373E. All regulators are programmable via the PMU. These blocks simplify power supply design for Bluetooth, and WLAN functions in embedded designs. |
| Pre-Calibration | RF system tested and calibrated in production |
| Sleep Clock | An external sleep clock of 32.768 KHz is required |
| Host Interface Options | The LWB5+ M.2 card provides two interfaces for customers to choose:
|
| Advanced WLAN |
|
| Advanced Bluetooth |
|
Specification Summary
Processor / SoC / Chipset
| Wireless | Cypress CYW4373EUBGT |
Wi-Fi
| Standards | IEEE 802.11a, 802.11b, 802.11e, 802.11g, 802.11h, 802.11i, 802.11k*, 802.11n, 802.11r, 802.11v*, 802.11ac |
| Interface | 1-bit or 4-bit Secure Digital I/O; USB 2.0 |
| Spatial Streams | 1 (1x1 SISO) [802.11ac/n] |
| Channel Support | 2.4 GHz:
5 GHz:
|
| Supported Data Rates | Support 802.11 ac/a/b/g/n 1x1 SISO. 802.11b (DSSS, CCK) 1, 2, 5.5, 11 Mbps 802.11a/g (OFDM) 6, 9, 12, 18, 24, 36, 48, 54 Mbps 802.11n (OFDM, HT20/HT40, MCS0-7) 802.11ac (OFDM, VHT20, MCS0-8; OFDM VHT40/VHT80, MCS 0-9) |
| Transmit Power Note: Transmit power on each channel varies per individual country regulations. All values are nominal with +/-2 dBm tolerance at room temperature. Tolerance could be up to +/-2.5 dBm across operating temperature. Note: HT40 – 40 MHz-wide channels | 802.11a
802.11b
802.11g
802.11n (2.4 GHz)
802.11n (5 GHz)
802.11ac (5 GHz)
Bluetooth
Note: The EIRP of Bluetooth transmissions may not exceed 10 dBm. This includes the radio output power and the antenna gain used in combination with the radio. |
Typical Receiver Sensitivity (PER <= 10%) Note: All values nominal, +/-3 dBm. | 802.11a:
802.11b:
802.11g:
802.11n (2.4 GHz):
802.11n (5 GHz):
802.11ac (5 GHz):
Bluetooth:
|
| Modulation Schemes | BPSK, QPSK, CCK, 16-QAM, 64-QAM, and 256-QAM. ![]() |
| Network Architecture Type | Infrastructure and ad-hoc |
| Wi-Fi Media | Direct Sequence-Spread Spectrum (DSSS) Complementary Code Keying (CCK) Orthogonal Frequency Divisional Multiplexing (OFDM) |
| Wi-Fi Multimedia | WMM Wi-Fi Multimedia - PowerSave (WMM-PS with U-APSD) WMM-Sequential Access (WMM-SA with PCF) |
Bluetooth
| Standards | Bluetooth 5.2 |
| Interface | Host Controller Interface (HCI) using high speed UART, USB 2.0 |
| Supported Data Rates | 1, 2, 3 Mbps |
| Bluetooth LE Modulation | GFSK@ 1 Mbps Pi/4-DQPSK@ 2 Mbps 8-DPSK@ 3 Mbps |
| Bluetooth Media | Frequency Hopping Spread Spectrum (FHSS) |
Radio Performance
| 2.4 GHz Frequency Bands | EU: 2.4 GHz to 2.483 GHz FCC/ISED: 2.4 GHz to 2.473 GHz MIC: 2.4 GHz to 2.495 GHz RCM: 2.4 GHz to 2.483 GHz |
| 5 GHz Frequency Bands | EU 5.15 GHz to 5.35 GHz (Ch 36/40/44/48/52/56/60/64) 5.47 GHz to 5.725 GHz (Ch 100/104/108/112/116/120/124/128/132/136/140) 5.725 GHz to 5.85 GHz (Ch 149/153/157/161/165) FCC 5.15 GHz to 5.35 GHz (Ch 36/40/44/48/52/56/60/64) 5.47 GHz to 5.725 GHz (Ch 100/104/108/112/116/120/124/128/132/136/140/144 5.725 GHz to 5.85 GHz (Ch 149/153/157/161/165) ISED 5.15 GHz to 5.35 GHz (Ch 36/40/44/48/52/56/60/64) 5.47 GHz to 5.725 GHz (Ch 100/104/108/112/116/132/136/140/144 5.725 GHz to 5.85 GHz (Ch 149/153/157/161/165) MIC 5.15 GHz to 5.35 GHz (Ch 36/40/44/48/52/56/60/64) 5.47 GHz to 5.725 GHz (Ch 100/104/108/112/116/120/124/128/132/136/140) RCM 5.15 GHz to 5.35 GHz (Ch 36/40/44/48/52/56/60/64) 5.47 GHz to 5.725 GHz (Ch 100/104/108/112/116/132/136/140 5.725 GHz to 5.85 GHz (Ch 149/153/157/161/165) |
Interfaces
| Physical Interfaces | M.2 2230 E-Key standard factor |
| Network Interfaces | Wi-Fi: 1-bit or 4-bit Secure Digital I/O; USB 2.0 Bluetooth: Host Controller Interface (HCI) using high speed UART, USB 2.0 |
Power
| Input Voltage | Typical DC 3.3 V, operating range from DC 3.2V to 3.6V |
| I/O Signal Voltage | Compliant with M.2 standard
|
Mechanical
| Dimensions | 30 mm (length) x 22 mm (width) x 3.1 mm (thickness) |
| Weight | 3g |
Software
| OS Support | Linux Android |
| Security |
|
Environmental
| Operating Temperature | -40° to 85°C (-40° to 185°F) |
| Storage Temperature | -40° to 85°C (-40° to 185°F) |
| Operating Humidity | 10 to 90% (non-condensing) |
| Storage Humidity | 10 to 90% (non-condensing) |
| Maximum Electrostatic Discharge | Conductive 4KV; Air coupled 8KV follow EN61000-4-2 |
| Lead Free | Lead-free and RoHS Compliant |
Certifications
| Regulatory Compliance | USA (FCC) EU – members of European Union (ETSI) Canada Australia Japan |
| Compliance Standards | EU
FCC
Industry Canada
RCM
MIC
|
| Bluetooth SIG | Bluetooth® SIG Qualification |
Warranty
| Warranty Terms | One Year Warranty |
Functional Descriptions
WLAN Functional Description
The LWB5+ M.2 module is designed based on the CYPRESS CYW4373EUBGT 802.11ac/a/b/g/n chipset. It is optimized for high speed, reliable, and low-power embedded applications. It’s integrated with dual-band WLAN (2.4/5GHz) and Bluetooth 5.2. Its functionality includes:
- Improved throughput on the link due to frame aggregation, RIFS (reduced inter-frame spacing), and half guard intervals.
- Support for LDPC (Low Density Parity Check) codes.
- Improved 11n performance due to features such as 11n frame aggregation (TX A-MPDU) and low-overhead host-assisted buffering (RX A-MPDU). These techniques can improve performance and efficiency of applications involving large bulk data transfers such as file transfers or high-resolution video streaming.
- IEEE 802.11ac, 1x1 SISO with data rate up to MCS9 (433.3Mbps).
Additional functionality is listed in the following table.
| Feature | Description | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| WLAN MAC |
| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| WLAN Security |
| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| WLAN Channel | Channel frequency supported.
| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Bluetooth Functional Description
| Feature | Description |
|---|---|
| Bluetooth Interface |
|
| Bluetooth Core functionality |
|
Bluetooth Low Energy (BLE) Core functionality |
|
Crystal Oscillator Requirement
| 32.768 KHz Oscillator | |
|---|---|
| Frequency Accuracy | 200 ppm |
| Duty Cycle | 30% – 70% |
| Input Signal Amplitude | 200-3300 mV, peak-peak |
| Signal Type | Square or Sine Wave |
| Clock Jitter | <10,000 ppm |
IMPORTANT: A 32.768 KHz crystal is required for the module to be functional. The module will not boot without this crystal.
Power-Up Sequence and Timing
Boot Mode
Description of Control Signals
- WL_REG_ON – Used by the PMU to power-up the WLAN section. When this pin is high, the regulators are enabled and the WLAN section is out of reset. When this pin is low the WLAN section is in reset. If both the BT_REG_ON and WL_REG_ON pins are low, the regulators are disabled.
- BT_REG_ON – Used by the PMU (OR-gated with WL_REG_ON) to power-up the internal regulators. If both the BT_REG_ON and WL_REG_ON pins are low, the regulators are disabled. When this pin is low and WL_REG_ON is high, the BT section is in reset.
Notes:
For both the WL_REG_ON and BT_REG_ON pins, there should be at least a 10-millisecond time delay between consecutive toggles (where both signals have been driven low). This allows time for the internal regulator to discharge. If this delay is not followed, there may be a VDDIO in-rush current on the order of 36 mA during the next PMU cold start.
The CYW4373E has an internal power-on reset (POR) circuit. The device is held in reset for a maximum of 110 milliseconds after VDDC and VDDIO have passed the POR threshold. Wait at least 150 milliseconds after VDDC and VDDIO are available before initiating SDIO accesses.
VBAT should not rise 10%–90% faster than 40 microseconds. VBAT should be up before or at the same time as VDDIO. VDDIO should NOT be present first or be held high before VBAT is high.
Control Signal Timing Diagrams
WLAN=ON; Bluetooth=ON

WLAN=OFF; Bluetooth=OFF

WLAN=ON; Bluetooth=OFF

WLAN=OFF; Bluetooth=ON

WLAN Boot up Sequence for SDIO Host

Hardware Architecture
Block Diagrams

Pin-Out
| Pin # | Name | Type | Voltage Ref. | Function | If Not Used |
|---|---|---|---|---|---|
| 1 | GND | - | - | Ground | GND |
| 2 | 3.3V | PWR I/P | 3.3V | DC supply voltage for module. Operational is 3.2V to 3.6V ( | -- |
| 3 | USB_D+ | I/O | - | Data plus of shared USB 2.0 port | NC |
| 4 | 3.3V | PWR I/P | 3.3V | DC supply voltage for module. Operational is 3.2V to 3.6V | -- |
| 5 | USB_D- | I/O | - | Data minus of shared USB 2.0 port | NC |
| 6 | LED1# | O | 3.3V | Reserved | NC |
| 7 | GND | - | - | Ground | GND |
| 8 | PCM_CLK | I/O | 1.8V | PCM clock. Can be master (Output) or slave (Input) | NC |
| 9 | SDIO CLK | I | 1.8V | SDIO clock input | NC |
| 10 | PCM_SYNC | I/O | 1.8V | PCM Sync. Can be master (Output) or slave (Input); Or SLIM bus data. | NC |
| 11 | SDIO CMD | I/O | 1.8V | SDIO command line | NC |
| 12 | PCM_OUT | O | 1.8V | PCM data output. | NC |
| 13 | SDIO DATA0 | I/O | 1.8V | SDIO data lin0 | NC |
| 14 | PCM_IN | I | 1.8V | PCM data input. | NC |
| 15 | SDIO DATA1 | I/O | 1.8V | SDIO data lin1 | NC |
| 16 | LED2# | O | 3.3V | Reserved | NC |
| 17 | SDIO DATA2 | I/O | 1.8V | SDIO data lin2 | NC |
| 18 | GND | - | - | Ground | GND |
| 19 | SDIO DATA3 | I/O | 1.8V | SDIO data lin3 | NC |
| 20 | UART WAKE# | O | 3.3V | Reserved for feature support BT_HOST_WAKE. Output signal to wake up Host. | NC |
| 21 | SDIO WAKE# | O | 1.8V | Reserved for feature support Reserved for WL_HOST_WAKE. Output signal to wake up host. | NC |
| 22 | UART_TXD | O | 1.8V | Serial data output for the HCI UART interface. | NC |
| 23 | SDIO RESET# | - | - | NC | NC |
| 32 | UART_RXD | I | 1.8V | Serial data input for the HCI UART interface. | NC |
| 33 | GND | - | - | Ground | GND |
| 34 | UART_RTS | O | 1.8V | Active-Low request-to-send signal for the HCI UART interface. | NC |
| 35 | PERp0 | - | - | NC | NC |
| 36 | UART_CTS | I | 1.8V | Active-Low clear-to-send signal for the HCI UART interface. | NC |
| 37 | PERn0 | - | - | NC | NC |
| 38 | VENDER DEFINED38 | - | - | NC | NC |
| 39 | GND | - | - | Ground | GND |
| 40 | VENDER DEFINED40 | I | 1.8V | Reserved for feature support BT_DEVICE_WAKE. Input signal from Host. | NC |
| 41 | PETp0 | - | - | NC | NC |
| 42 | VENDER DEFINED42 | I/O | 1.8V | Reserved for feature support Reserved for WL_DEVICE_WAKE. Input from Host to wake up WLAN module. | NC |
| 43 | PETn0 | - | - | NC | NC |
| 44 | COEX3 | - | - | NC | NC |
| 45 | GND | - | - | Ground | GND |
| 46 | COEX2 | I/O | 1.8V | Reserved for feature support WCI-2 LTE coexistence Interface | NC |
| 47 | REFCLKp0 | - | - | NC | NC |
| 48 | COEX1 | I/O | 1.8V | Reserved for feature support WCI-2 LTE coexistence Interface | NC |
| 49 | REFCLKn0 | - | - | NC | NC |
| 50 | SUSCLK | I | - | External Sleep Clock input (32.768KHz) The sleep clock is always needed for using this module | -- |
| 51 | GND | - | - | Ground | GND |
| 52 | PERST0# | - | - | NC | NC |
| 53 | CLKREQ0# | - | - | NC | NC |
| 54 | W_DISABLE2# | I | 3.3V | Enables BT regulators. Internal 100K pull-up to enable BT by default. Ground to disable BT. | NC |
| 55 | PEWAKE0# | - | - | NC | NC |
| 56 | W_DISABLE1# | I | 3.3 V | Enables WLAN regulators. Internal 100K pull-up to enable WLAN by default. Ground to disable WLAN. | NC |
| 57 | GND | - | - | Ground | GND |
| 58 | I2C DATA | - | - | NC | NC |
| 59 | RESERVED | - | - | NC | NC |
| 60 | I2C CLK | - | - | NC | NC |
| 61 | RESERVED | - | - | NC | NC |
| 62 | ALERT# | - | - | NC | NC |
| 63 | GND | - | - | Ground | GND |
| 64 | RESERVED | - | - | NC | NC |
| 65 | RESERVED | - | - | NC | NC |
| 66 | UIM_SWP | - | - | NC | NC |
| 67 | RESERVED | - | - | NC | NC |
| 68 | UIM_POWER_SNK | - | - | NC | NC |
| 69 | GND | - | - | Ground | GND |
| 70 | UIM_POWER_SRC | - | - | NC | NC |
| 71 | RESERVED | - | - | NC | NC |
| 72 | 3.3V | PWR I/P | 3.3V | DC supply voltage for module. Operational is 3.2V to 3.6V | -- |
| 73 | RESERVED | - | - | NC | NC |
| 74 | 3.3V | PWR I/P | 3.3V | DC supply voltage for module. Operational is 3.2V to 3.6V | -- |
| 75 | GND | - | - | Ground | GND |
Mechanical Drawings
Module dimensions of LWB5+ M.2 module is 17 x 12 x 2.1 mm.


Note:
The Wi-Fi MAC address is located on the product label.
The last digit of Wi-Fi MAC address is assigned to either 0, 2, 4, 6, 8, A, C, E.
The BT MAC address is the Wi-Fi MAC address plus 1.
Host Interface Specifications
SDIO Specifications
The LWB5+ M.2 module SDIO host interface pins are powered from the VIO_SD voltage supply, which is set internally at 1.8V on the M.2 module. The SDIO electrical specifications are identical for the 1-bit SDIO and 4-bit SDIO modes.
Note: The SDIO host signals must be 1.8v at all times as defined by the M.2 standard.
Default Speed, High-speed Modes


Note: Over full range of values specified in the Recommended Operating Conditions unless otherwise specified.
Timing Requirements
| Symbol | Parameter | Condition | Min. | Typ. | Max. | Unit |
|---|---|---|---|---|---|---|
| fPP | Clock Frequency | Default Speed High-Speed | 0 0 | - - | 25 50 | MHz |
| TWL | Clock low time | Default Speed High-Speed | 10 7 | - - | - - | ns |
| TWH | Clock high time | Default Speed High-Speed | 10 7 | - - | - - | ns |
| TISU | Input Setup time | Default Speed High-Speed | 5 6 | - - | - - | ns |
| TIH | Input Hold time | Default Speed High-Speed | 5 2 | - - | - - | ns |
| TODLY | Output delay time CL≦40pF (1 card) | Default Speed High-Speed | - - | - - | 14 14 | ns |
| TOH | Output hold time | High-Speed | 0 | - | - | ns |
SDR12, SDR25, SDR50 Mode (up to 100MHz) (1.8V)

Note: Over full range of values specified in the Recommended Operating Conditions unless otherwise specified.
SDIO timing requirements--- SDR12, SDR25, SDR50 modes (up to 100 MHz) (1.8V)
| Symbol | Parameter | Condition | Min. | Typ. | Max. | Unit |
|---|---|---|---|---|---|---|
| fPP | Clock Frequency | SDR12/25/50 | 25 | - | 100 | MHz |
| TISU | Input setup time | SDR12/25/50 | 3 | -- | - | ns |
| TIH | Input Hold time | SDR12/25/50 | 0.8 | - | - | ns |
| TCLK | Clock Time | SDR12/25/50 | 10 | - | 40 | ns |
| TCR, TCF | Raise time, Fall time TCR, TCF <2ns (max) at 100MHz CCARD=10pF | SDR12/25/50 | - | - | 0.2*TCLK | ns |
| TODLY | Output delay time CL≦30pF | SDR12/25/50 | - | - | 7.5 | ns |
| TOH | Output hold time CL=15pF | SDR12/25/50 | 1.5 | - | - | ns |
SDR104 Mode (208 MHz) (1.8V)

Note: Over full range of values specified in the Recommended Operating Conditions unless otherwise specified.
SDIO timing requirements--- SDR104 modes (up to 208MHz) (1.8V)
| Symbol | Parameter | Condition | Min. | Typ. | Max. | Unit |
|---|---|---|---|---|---|---|
| fPP | Clock Frequency | SDR104 | 0 | - | 208 | MHz |
| TISU | Input setup time | SDR104 | 1.4 | -- | - | ns |
| TIH | Input Hold time | SDR104 | 0.8 | - | - | ns |
| TCLK | Clock Time | SDR104 | 4.8 | - | - | ns |
| TCR, TCF | Raise time, Fall time TCR, TCF <0.96ns (max) at 208MHz CCARD=10pF | SDR104 | - | - | 0.2*TCLK | ns |
| TOP | Card Output phase | SDR104 | 0 | - | 10 | ns |
| TODW | Output timing pf variable data window | SDR12/25/50 | 2.88 | - | - | ns |
SDR50 Mode (50MHz) (1.8V)


Note: In SDR50 mode, DAT[3:0] lines are samples on both edges pf the clock (not applicable for CMD line)
SDIO timing requirements – SDR50 modes (50 MHz)
| Symbol | Parameter | Condition | Min. | Typ. | Max. | Unit | |
|---|---|---|---|---|---|---|---|
| Clock | |||||||
| TCLK | Clock time 50MHz (max) between rising edge | SDR50 | 20 | -- | -- | ns | |
| TCR, TCF | Rise time, fall time TCR, TCF <4.00ns (max) at 50MHz. CCARD=10pF | SDR50 | -- | -- | 0.2*TCLK | ns | |
| Clock Duty | -- | SDR50 | 45 | -- | 55 | % | |
| CMD Input (referenced to clock rising edge) | |||||||
| TIS | Input setup time CCARD≦10pF (1 card) | SDR50 | 6 | -- | -- | ns | |
| TIH | Input hold time CCARD≦10pF (1 card) | SDR50 | 0.8 | -- | -- | ns | |
| CMD Output (referenced to clock rising and failing edge) | |||||||
| TODLY | Output delay time during data transfer mode CL≦30pF (1 card) | SDR50 | -- | -- | 13.7 | ns | |
| TOHLD | Output hold time CL≥15pF (1 card) | SDR50 | 1.5 | -- | -- | ns | |
| DAT[3:0] Input (referenced to clock rising and failing edges) | |||||||
| TIS2X | Input setup time CCARD≦10pF (1 card) | SDR50 | 3 | -- | -- | ns | |
| TIH2X | Input hold time CCARD≦10pF (1 card) | SDR50 | 0.8 | -- | -- | ns | |
| DAT[3:0] Output (referenced to clock rising and failing edges) | |||||||
| TODLY2X (max) | Output delay time during data transfer mode CL≦25pF (1 card) | SDR50 | -- | -- | 7.0 | ns | |
| TODLY2X (min) | Output hold time CL≥15pF (1 card)) | SDR50 | 1.5 | -- | -- | ns | |
USB Specification
The LWB5+ M.2 module can be powered through the USB interface and an external regulator is required to convert a 3.3V voltage for the LWB5+ M.2 module.
The LWB5+ M.2 module shares a USB2.0 interface between WLAN and Bluetooth. The data bus DP/DM as USB signaling. The following shows the WLAN/Bluetooth shared USB interface timing.

PCM Interface Specifications

| Symbol | Parameter | Min. | Typ. | Max. | Unit |
|---|---|---|---|---|---|
| FBCLK | - | - | 2/2.048 | - | MHz |
| Duty CycleBCLK | - | 0.4 | 0.5 | 0.6 | - |
| TBCLK rise/fall | - | - | 3 | - | ns |
| TDO | - | - | - | 15 | ns |
| TDISU | - | 20 | - | - | ns |
| TDIHO | - | 15 | - | - | ns |
| TBF | - | - | - | 15 | ns |

| Symbol | Parameter | Min. | Typ. | Max. | Unit |
|---|---|---|---|---|---|
| FBCLK | - | - | 2/2.048 | - | MHz |
| Duty CycleBCLK | - | 0.4 | 0.5 | 0.6 | - |
| TBCLK rise/fall | - | - | 3 | - | ns |
| TDO | - | - | - | 30 | ns |
| TDISU | - | 15 | - | - | ns |
| TDIHO | - | 10 | - | - | ns |
| TBFSU | - | 15 | - | - | ns |
| TBFHO | - | 10 | - | - | ns |
Electrical Characteristics
Absolute Maximum Ratings
The following table summarizes the absolute maximum ratings for the LWB5+ M.2 module. Absolute maximum ratings are those values beyond which damage to the device can occur. Functional operation under these conditions, or at any other condition beyond those indicated in the operational sections of this document, is not recommended.
Note: Maximum rating for signals follows the supply domain of the signals.
| Symbol (Domain) | Parameter | Max Rating | Unit |
|---|---|---|---|
| 3V3 | External 3.3V power supply | 4.0 | V |
| Storage | Storage Temperature | -40 to +85 | °C |
| Antenna | Maximum RF input (reference to 50-Ω input) | +10 | dBm |
| ESD | Electrostatic discharge tolerance | 2000 | V |
Recommended Operating Conditions
The following table lists the recommended operating conditions for the LWB5+ M.2 module.
| Symbol (Domain) | Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|---|
| 3V3 | External 3.3V power supply | 3.2 | 3.30 | 3.6 | V |
| T-ambient | Ambient temperature | -40 | 25 | 85 | °C |
DC Electrical Characteristics
The following table lists the general DC electrical characteristics over recommended operating conditions (unless otherwise specified).
| Symbol | Parameter | Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| VIH | High Level Input Voltage | — | 1.17 | — | — | V |
| VIL | Low Level Input Voltage | — | — | — | 0.63 | V |
| VOH | Output high Voltage | — | 1.35 | — | — | V |
| VOL | Output low Voltage | — | — | — | 0.45 | V |
Current Consumption
WLAN current consumption on 5 GHz (SDIO=VDIO=1.8V)
| Freq. | Mode/Rate [Mbps] | Output Power Per Chain [dBm] | Maximum Current Consumption (mA) |
|---|---|---|---|
5180 MHz 5190 MHz 5210 MHz | 6 Mbps | 17 dBm | 378 |
| 54 Mbps | 15 dBm | 341 | |
| HT20 MCS 0 | 17 dBm | 382 | |
| HT20 MCS 7 | 15 dBm | 352 | |
| HT40 MCS 0 | 13 dBm | 367 | |
| HT40 MCS 7 | 13 dBm | 354 | |
| VHT80 MCS 0 | 12 dBm | 391 | |
| VHT80 MCS 9 | 11 dBm | 339 | |
5500 MHz 5510 MHz 5530 MHz | 6 Mbps | 17 dBm | 378 |
| 54 Mbps | 15 dBm | 341 | |
| HT20 MCS 0 | 17 dBm | 382 | |
| HT20 MCS 7 | 15 dBm | 352 | |
| HT40 MCS 0 | 13 dBm | 367 | |
| HT40 MCS 7 | 13 dBm | 354 | |
| VHT80 MCS 0 | 12 dBm | 391 | |
| VHT80 MCS 9 | 11 dBm | 339 | |
5825 MHz 5795 MHz | 6 Mbps | 17 dBm | 378 |
| 54 Mbps | 15 dBm | 341 | |
| HT20 MCS 0 | 17 dBm | 382 | |
| HT20 MCS 7 | 15 dBm | 352 | |
| HT40 MCS 0 | 13 dBm | 367 | |
| HT40 MCS 0 | 13 dBm | 354 | |
| 5775 MHz | VHT80 MCS 0 | 12 dBm | 391 |
| VHT80 MCS 9 | 11 dBm | 339 |
Note: Final TX power values on each channel are limited by regulatory requirements
Bluetooth current consumption, VBAT=VDDIO=3.3V
| Operating Mode | Tx | Rx | Unit |
|---|---|---|---|
| DH1 | 24.07 | 24.06 | mA |
| DH3 | 29.23 | 29.03 | mA |
| DH5 | 30.04 | 30.02 | mA |
| 2DH1 | 18.24 | 18.19 | mA |
| 2DH3 | 25.46 | 25.12 | mA |
| 2DH5 | 25.83 | 25.77 | mA |
| 3DH1 | 21.47 | 21.43 | mA |
| 3DH3 | 25.21 | 25.26 | mA |
| 3DH5 | 25.84 | 25.79 | mA |
| LE | 30.37 | 14.61 | mA |
Bluetooth current consumption, VBAT=3.3V, VDDIO=1.8V
| Operating Mode | Tx | Rx | Unit |
|---|---|---|---|
| DH1 | 23.62 | 23.57 | mA |
| DH3 | 28.57 | 28.54 | mA |
| DH5 | 29.62 | 29.62 | mA |
| 2DH1 | 17.65 | 17.77 | mA |
| 2DH3 | 24.06 | 24.07 | mA |
| 2DH5 | 25.11 | 25.12 | mA |
| 3DH1 | 20.91 | 20.87 | mA |
| 3DH3 | 24.42 | 24.72 | mA |
| 3DH5 | 25.34 | 25.29 | mA |
| LE | 30.04 | 14.19 | mA |
Peak PHY Calibration Current
| Mode | VBAT = 3.3V, VDDIO = 1.8V, TA = 25°C VBAT, mA | VBAT = 3.3V, VDDIO = 1.8V, TA = 25°C VIO, µA |
|---|---|---|
| Unassociated (2.4 GHz) | 768 | 510 |
| Associated (2.4 GHz) | 748 | 560 |
| Unassociated (5 GHz) | 666 | 410 |
| Associated (5 GHz) | 664 | 390 |
Radio Characteristics
WLAN Radio Receiver Characteristics
The following tables summarize the LWB5+ M.2 module receiver characteristics.
WLAN receiver characteristics for 2.4 GHz
| Symbol | Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|---|
| Frx | Receive input frequency range | 2.412 | — | 2.484 | GHz |
| Srf | CCK, 1 Mbps | — | -95 | — | dBm |
| CCK, 11 Mbps | — | -88 | — | ||
| OFDM, 6 Mbps | — | -92 | — | ||
| OFDM, 54 Mbps | — | -75 | — | ||
| HT20, MCS0 | — | -92 | — | ||
| HT20, MCS7 | — | -73 | — | ||
| HT40, MCS0 | — | -89 | — | ||
| HT40, MCS7 | — | -70 | — | ||
| Radj | OFDM, 6 Mbps | 16 | 38 | — | dB |
| OFDM, 54 Mbps | -1 | 20.4 | — | ||
| HT20, MCS0 | 16 | 33.3 | — | ||
| HT20, MCS7 | -2 | 13.7 | — |
WLAN Receiver Characteristics for 5 GHz
| Symbol | Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|---|
| Frx | Receive input frequency range | 5.15 | — | 5.825 | GHz |
| Srf | OFDM, 6 Mbps | — | -89 | — | dBm |
| OFDM, 54 Mbps | — | -73 | — | ||
| HT20, MCS0 | — | -89 | — | ||
| HT20, MCS7 | — | -70 | — | ||
| HT40, MCS0 | — | -86 | — | ||
| HT40, MCS7 | — | -66 | — | ||
| VHT20, MCS0 | — | -88 | — | ||
| VHT20, MCS8 | — | -66 | — | ||
| VHT40, MCS0 | — | -86 | — | ||
| VHT40, MCS9 | — | -62 | — | ||
| VHT80, MCS0 | — | -83 | — | ||
| VHT80, MCS9 | — | -59 | — | ||
Radj (Difference between interfering and desired signal (20 MHz apart)) | OFDM, 6 Mbps | 16 | 31.7 | — | dB |
| OFDM, 54 Mbps | -1 | 13.8 | — | ||
| OFDM, 65 Mbps | -2 | 8.4 | — | ||
Radj. (Difference between interfering and desired signal (40 MHz apart)) | OFDM, 6 Mbps | 32 | 44.7 | — | dB |
| OFDM, 54 Mbps | 15 | 26.6 | — | ||
| OFDM, 65 Mbps | 14 | 26.8 | — |
WLAN Transmitter Characteristics
WLAN transmitter characteristics for 2.4 GHz operation (SDIO=VDIO=1.8V)
| Symbol | Parameter | Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| Ftx | Transmit output frequency range | — | 2.412 | — | 2.484 | GHz |
| Pout | 11b mask compliant | 1-11 Mbps | — | 18 | — | dBm |
| 11g mask compliant | 6-36 Mbps | — | 17.5 | — | ||
| 11g EVM compliant | 48-54 Mbps | — | 16.5 | — | ||
| 11n HT20 mask compliant | MCS 0-5 | — | 15.5 | — | ||
| 11n HT20 EVM compliant | MCS 6-7 | — | 15.5 | — | ||
| 11n HT40 mask compliant | MCS 0-5 | — | 11.5 | — | ||
| 11n HT40 EVM compliant | MCS 6-7 | — | 11.5 | — | ||
| ATx | Transmit power accuracy at 25 ℃ | — | -2.0 | — | +2.0 | dB |
| Freq. | Mode/Rate (Mbps) | Output Power (dBm) | Maximum Current Consumption (mA) |
|---|---|---|---|
| 2412 MHz | 1 Mbps | 18 dBm | 390 |
| 11 Mbps | 18 dBm | 406 | |
| 6 Mbps | 17.5 dBm | 406 | |
| 54 Mbps | 16.5 dBm | 364 | |
| HT20 MCS 0 | 15.5 dBm | 361 | |
| HT20 MCS 7 | 15.5 dBm | 339 | |
| HT40 MCS 0 | 11.5 dBm | 324 | |
| HT40 MCS 7 | 11.5 dBm | 298 | |
2442 MHz | 1 Mbps | 18 dBm | 390 |
| 11 Mbps | 18 dBm | 406 | |
| 6 Mbps | 17.5 dBm | 406 | |
| 54 Mbps | 16.5 dBm | 364 | |
| HT20 MCS 0 | 15.5 dBm | 361 | |
| HT20 MCS 7 | 15.5 dBm | 339 | |
| HT40 MCS 0 | 11.5 dBm | 324 | |
| HT40 MCS 7 | 11.5 dBm | 298 | |
2472 MHz | 1 Mbps | 18 dBm | 390 |
| 11 Mbps | 18 dBm | 406 | |
| 6 Mbps | 17.5 dBm | 406 | |
| 54 Mbps | 16.5 dBm | 364 | |
| HT20 MCS 0 | 15.5 dBm | 361 | |
| HT20 MCS 7 | 15.5 dBm | 339 | |
| HT40 MCS 0 | 11.5 dBm | 324 | |
| HT40 MCS 7 | 11.5 dBm | 298 |
WLAN transmitter characteristics for 5 GHz operation (SDIO=VDIO=1.8V)
| Symbol | Parameter | Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| Ftx | Transmit output frequency range | — | 5.15 | — | 5.925 | GHz |
| Pout | Output power | See Note2 | — | — | — | — |
| 11a mask compliant | 6-48 Mbps | — | 17 | — | dBm | |
| 11a EVM compliant | 54 Mbps | — | 15 | — | ||
| 11n HT20 mask compliant | MCS 0-5 | — | 17 | — | ||
| 11n HT20 EVM compliant | MCS 6-7 | — | 15 | — | ||
| 11n HT40 mask compliant | MCS 0-5 | — | 13 | — | ||
| 11n HT40 EVM compliant | MCS 6-7 | — | 13 | — | ||
| 11ac VHT20 mask compliant | MCS 0-5 | — | 17 | — | ||
| 11ac VHT20 EVM compliant | MCS 6-7 | — | 15 | — | ||
| 11ac VHT20 EVM compliant | MCS 8 | — | 11.5 | — | ||
| 11ac VHT40 mask compliant | MCS 0-5 | — | 13 | — | ||
| 11ac VHT40 EVM compliant | MCS 6-7 | — | 13 | — | ||
| 11ac VHT40 EVM compliant | MCS 8-9 | — | 11.5 | — | ||
| 11ac VHT80 mask compliant | MCS 0-5 | — | 12 | — | ||
| 11ac VHT80 EVM compliant | MCS 6-7 | — | 12 | — | ||
| 11ac VHT80 EVM compliant | MCS 8-9 | — | 11 | — | ||
| ATx | Transmit power accuracy at 25 ℃ | — | -2.0 | — | +2.0 | dB |
Bluetooth Transmitter Characteristics
The following describe the basic rate transmitter performance, basic rate receiver performance, enhanced rate receiver performance, and current consumption conditions at 25°C.
Basic rate transmitter performance temperature at 25°C (3.3V)
| Test Parameter | Min | Typ | Max | BT Spec. | Unit | ||
|---|---|---|---|---|---|---|---|
| Maximum RF Output Power | GFSK | — | — | 7 | 0 ~ +20 | dBm | |
| π/4-DQPSK | — | 3 | — | ||||
| 8-DPSK | — | 3 | — | ||||
| Frequency Range | 2.4 | — | 2.4835 | 2.4 ≤ f ≤ 2.4835 | GHz | ||
| 20 dB Bandwidth | — | 919.5 | — | ≤ 1000 | KHz | ||
| Δf1avg Maximum Modulation | 140 | 155 | 175 | 140 < Δf1avg < 175 | KHz | ||
| Δf2max Minimum Modulation | 115 | 135 | — | ≥ 115 | KHz | ||
| Δf2avg/Δf1avg | — | 0.9 | — | ≥ 0.80 | — | ||
| Initial Carrier Frequency | — | ± 25 | ± 75 | ≤ ± 75 | KHz | ||
| Frequency Drift (DH1 packet) | — | ± 10 | ± 25 | ± 25 | KHz | ||
| Frequency Drift (DH3 packet) | — | ± 10 | ± 40 | ± 40 | KHz | ||
| Frequency Drift (DH5 packet) | — | ± 10 | ± 40 | ± 40 | KHz | ||
| Drift rate | — | 8 | 20 | 20 | KHz/50us | ||
| Adjacent Channel Power | F ≥ ± 3 MHz | — | -50 | — | < -40 | dBm | |
| F = ± 2 MHz | — | -46 | — | ≤ -20 | dBm | ||
| F = ± 1 MHz | — | -15 | — | N/A | dBm | ||
Basic rate receiver performance at 3.3V
| Test Parameter | Min | Typ | Max | BT Spec. | Unit | |
|---|---|---|---|---|---|---|
| Sensitivity (1DH5) | BER ≤ 0.1% | — | -90 | — | ≤ -70 | dBm |
| Maximum Input | BER ≤ 0.1% | — | — | -20 | ≥ -20 | dBm |
| Interference Performance | Co-Channel | — | 9 | 11 | 11 | dB |
| C/I 1 MHz adjacent channel | — | -5.5 | 0 | 0 | dB | |
| C/I 2 MHz adjacent channel | — | -38 | -30 | -30 | dB | |
| C/I ≥ 3 MHz adjacent channel | — | -46 | -40 | -40 | dB | |
| C/I image channel | — | -25.5 | -9 | -9 | dB | |
| C/I 1-MHz adjacent to image channel | — | -39 | -20 | -20 | dB | |
Enhanced data rate receiver performance (3.3V)
| Test Parameter | Min | Typ | Max | BT Spec. | Unit | |
| Sensitivity (BER ≤ 0.01%) | π/4-DQPSK | — | -92 | — | ≤ -70 | dBm |
| 8-DPSK | — | -86 | — | ≤ -70 | dBm | |
| Maximum Input (BER ≤ 0.1%) | π/4-DQPSK | — | — | -20 | ≥ -20 | dBm |
| 8-DPSK | — | — | -20 | ≥ -20 | dBm | |
| C/I Co-Channel (BER ≤ 0.1%) | π/4-DQPSK | — | 10.5 | 13 | ≤ ±13 | dB |
| 8-DPSK | — | 17.5 | 21 | ≤ ±21 | dB | |
| C/I 1 MHz adjacent Channel | π/4-DQPSK | — | -6 | 0 | ≤ 0 | dB |
| 8-DPSK | — | -3 | 5 | ≤5 | dB | |
| C/I 2 MHz adjacent Channel | π/4-DQPSK | — | -38.5 | -30 | ≤ -30 | dB |
| 8-DPSK | — | -37.5 | -25 | ≤ -25 | dB | |
| C/I ≥ 3 MHz adjacent Channel | π/4-DQPSK | — | -47 | -40 | ≤ -40 | dB |
| 8-DPSK | — | -39.5 | -33 | ≤ -33 | dB | |
| C/I image channel | π/4-DQPSK | — | -24.5 | -7 | ≤ -7 | dB |
| 8-DPSK | — | -17 | 0 | ≤ 0 | dB | |
| C/I 1 MHz adjacent to image channel | π/4-DQPSK | — | -43 | -20 | ≤ -20 | dB |
| 8-DPSK | — | -37 | -13 | ≤ -13 | dB | |
Out-of-Band Blocking Performance (CW) BER ≤ 0.1% | 30-2000MHz | — | -10 | — | — | dBm |
| 2-2.399GHz | — | -27 | — | — | dBm | |
| 2.484-3GHz | — | -27 | — | — | dBm | |
| 3-12.75GHz | — | -10 | — | — | dBm | |
BLE RF Specifications (3.3V)
Notes:
[3] Dirty Tx is Off.
[4] The BLE TX power cannot exceed 10 dBm EIRP specification limit. The front-end losses and antenna gain/loss must be factored in so as not to exceed the limit.
[5] At least 99.9% of all Δf2 maximum frequency values recorded over 10 packets must be greater than 185 KHz.
Integration Guidelines
Mounting
The LWB5+ M.2 module connects to the host via a standard PCI EXPRESS M2 connector. The Kyocera’s (www.Kyocera-connector.com) 6411 series provide 1.8 mm, 2.3 mm and 3.2 mm connector heights and JAE’s (https://www.jae.com/en/ ) SM3 series provide 1.2 mm, 2.15 mm, 3.1 mm and 4.1 mm connector heights.
Because the LWB5+ M.2 module is a single-side component module, we recommend the following part numbers which have 2.3 mm and 3.1 mm connector height):
| M.2 Key-E Connector | Connector Height |
|---|---|
| KYOCERA 24-6411-067-101-894E | 2.3 mm |
| JAE SM3ZS067U310AERxxxx | 3.1 mm |
The stand-off mating to the recommend 2.3 mm connector from EMI STOP (www.EMISTOP.com) is part number F50M16-041525P1D4M and 3.1mm from JAE (https://www.jae.com/en/ ) is part number SM3ZS067U310-NUT1-Rxxxx.
| M.2 Key-E Connector | Stand-off |
|---|---|
| KYOCERA 24-6411-067-101-894E | EMI STOP F50M16-041525P1D4M |
| JAE SM3ZS067U310AERxxxx | JAE SM3ZS067U310-NUT1-Rxxxx |
PCB Layout
The following is a list of RF layout design guidelines and recommendation when installing a Ezurio radio into your device.
- Do not run antenna cables directly above or directly below the radio.
- Do not place any parts or run any high-speed digital lines below the radio.
- If there are other radios or transmitters located on the device (such as a Bluetooth radio), place the devices as far apart from each other as possible. Also, make sure there is at least 25 dB isolation between these two antennas.
- Ensure that there is the maximum allowable spacing separating the antenna connectors on the Ezurio radio from the antenna. In addition, do not place antennas directly above or directly below the radio.
- Ezurio recommends the use of a double-shielded cable for the connection between the radio and the antenna elements.
- Be sure to put a 10uF capacitor on EACH 3.3V power pin. Also, place that capacitor to the pin as close as possible to make sure the internal PMU working correctly.
- Use proper electro-static-discharge (ESD) procedures when installing the Ezurio radio module.
- To avoid negatively impacting Tx power and receiver sensitivity, do not cover the antennas with metallic objects or components.
PCB Layout on Host PCB - General




Shipping and Labeling
Shipping



Labeling
The following label is placed on the bag and the inner box.

The following label is located on the adjacent sides of the master carton.

Environmental and Reliability
Environmental Requirements
Required Storage Conditions
Prior to Opening the Dry Packing
The following are required storage conditions prior to opening the dry packing:
- Normal temperature: 5~40˚C
- Normal humidity: 80% (Relative humidity) or less
- Storage period: One year or less
Note: Humidity means Relative Humidity.
After Opening the Dry Packing
The following are required storage conditions after opening the dry packing (to prevent moisture absorption):
Storage conditions for one-time soldering:
- Temperature: 5-25°C
- Humidity: 60% or less
- Period: 72 hours or less after opening
Storage conditions for two-time soldering
Storage conditions following opening and prior to performing the 1st reflow:
- Temperature: 5-25°C
- Humidity: 60% or less
- Period: A hours or less after opening
Storage conditions following completion of the 1st reflow and prior to performing the 2nd reflow
- Temperature: 5-25°C
- Humidity: 60% or less
- Period: B hours or less after completion of the 1st reflow
Note: Should keep A+B within 72 hours.
Precautions for Use
- Opening/handing/removing must be done on an anti-ESD treated workbench.
All workers must also have undergone anti-ESD treatment.
- The devices should be mounted within one year of the date of delivery.
Regulatory, Qualification & Certifications
Regulatory Approvals
Note: For complete regulatory information, refer to the Sterling LWB5+ Regulatory Information document which is also available from the Sterling LWB5+ product page.
The Sterling LWB5+ holds current certifications in the following countries:
| Country/Region | Regulatory ID |
|---|---|
| USA (FCC) | SQG-LWB5PLUS |
| EU | N/A |
| Canada (ISED) | 3147A-LWB5PLUS |
| Japan (MIC) | 201-200402 |
| Australia | N/A |
| New Zealand | N/A |
Bluetooth SIG Qualification
The Bluetooth Qualification Process promotes global product interoperability and reinforces the strength of the Bluetooth® brand and ecosystem to the benefit of all Bluetooth SIG members. The Bluetooth Qualification Process helps member companies ensure their products that incorporate Bluetooth technology comply with the Bluetooth Patent & Copyright License Agreement and the Bluetooth Trademark License Agreement (collectively, the Bluetooth License Agreement) and Bluetooth Specifications.
The Bluetooth Qualification Process is defined by the Qualification Program Reference Document (QPRD) v3.
To demonstrate that a product complies with the Bluetooth Specification(s), each member must for each of its products:
- Identify the product, the design included in the product, the Bluetooth Specifications that the design implements, and the features of each implemented specification
- Complete the Bluetooth Qualification Process by submitting the required documentation for the product under a user account belonging to your company
The Bluetooth Qualification Process consists of the phases shown below:

To complete the Qualification Process the company developing a Bluetooth End Product shall be a member of the Bluetooth SIG. To start the application please use the following link: Apply for Adopter Membership
Scope
This guide is intended to provide guidance on the Bluetooth Qualification Process for End Products that reference multiple existing designs, that have not been modified, (refer to Section 3.2.2.1 of the Qualification Program Reference Document v3).
For a Product that includes a new Design created by combining two or more unmodified designs that have DNs or QDIDs into one of the permitted combinations in Table 3.1 of the QPRDv3, a Member must also provide the following information:
- DNs or QDIDs for Designs included in the new Design
- The desired Core Configuration of the new Design (if applicable, see Table 3.1 below)
- The active TCRL Package version used for checking the applicable Core Configuration (including transport compatibility) and evaluating test requirements
Any included Design must not implement any Layers using withdrawn specification(s).
When creating a new Design using Option 2a, the Inter-Layer Dependency (ILD) between Layers included in the Design will be checked based on the latest TCRL Package version used among the included Designs.
For the purposes of this document, it is assumed that the member is combining unmodified Core-Controller Configuration and Core-Host Configuration designs, to complete a Core-Complete Configuration.
Qualification Steps When Referencing multiple existing designs, (unmodified) – Option 2a in the QPRDv3
For this qualification option, follow these steps:
- To start a listing, go to: https://qualification.bluetooth.com/
- Select Start the Bluetooth Qualification Process.
Product Details to be entered:
- Project Name (this can be the product name or the Bluetooth Design name).
- Product Description
- Model Number
- Product Publication Date (the product publication date may not be later than 90 days after submission)
- Product Website (optional)
- Internal Visibility (this will define if the product will be visible to other users prior to publication)
- If you have multiple End Products to list then you can select ‘Import Multiple Products’, firstly downloading and completing the template, then by ‘Upload Product List’. This will populate Qualification Workspace with all your products.
Specify the Design:
- Do you include any existing Design(s) in your Product? Answer Yes, I do.
- Enter the multiple DNs or QDIDs used in your, (for Option 2a two or more DNs or QDIDs must be referenced)
- Select ‘I’m finished entering DN’s
- Once the DNs or QDIDs are selected they will appear on the left-hand side, indicating the layers covered by the design (should show Core-Controller and Core Host Layers covered).
- What do you want to do next? Answer, ‘Combine unmodified Designs’.
- The Qualification Workspace Tool will indicate that a new Design will be created and what type of Core-Complete configuration is selected.
- An active TCRL will be selected for the design.
- Perform the Consistency Check, which should result in no inconsistencies
- If there are any inconsistencies these will need to be resolved before proceeding
- Save and go to Test Plan and Documentation
Test Plan and Documentation
- As no modifications have been made to the combined designs the tool should report the following message:
‘No test plan has been generated for your new Design. Test declarations and test reports do not need to be submitted. You can continue to the next step.’ - Save and go to Product Qualification fee
- As no modifications have been made to the combined designs the tool should report the following message:
Product Qualification Fee:
- It’s important to make sure a Prepaid Product Qualification fee is available as it is required at this stage to complete the Qualification Process.
- Prepaid Product Qualification Fee’s will appear in the available list so select one for the listing.
- If one is not available select ‘Pay Product Qualification Fee’, payment can be done immediately via credit card, or you can pay via Invoice. Payment via credit will release the number immediately, if paying via invoice the number will not be released until the invoice is paid.
- Once you have selected the Prepaid Qualification Fee, select ‘Save and go to Submission’
Submission:
- Some automatic checks occur to ensure all submission requirements are complete.
- To complete the listing any errors must be corrected
- Once you have confirmed all design information is correct, tick all of the three check boxes and add your name to the signature page.
- Now select ‘Complete the Submission’.
- You will be asked a final time to confirm you want to proceed with the submission, select ‘Complete the Submission’.
- Qualification Workspace will confirm the submission has been submitted. The Bluetooth SIG will email confirmation once the submission has been accepted, (normally this takes 1 working day).
Download Product and Design Details (SDoC):
- You can now download a copy of the confirmed listing from the design listing page and save a copy in your Compliance Folder
For further information, please refer to the following webpage:
https://www.bluetooth.com/develop-with-bluetooth/qualification-listing/
Example Design Combinations
Ezurio Controller Subsystem + BlueZ 5.50 Host Stack (Ezurio Sterling LWB5+ based design)
| Design Name | Owner | Declaration ID | QD ID | Link to listing on the SIG website |
|---|---|---|---|---|
| Sterling LWB5+ | Ezurio | D050382 | 159315 | https://qualification.bluetooth.com/ListingDetails/119009 |
| BlueZ 5.50 Host Stack | Ezurio | D046330 | 138224 | https://qualification.bluetooth.com/ListingDetails/93911 |
Qualify More Products
If you develop further products based on the same design in the future, it is possible to add them free of charge. The new product must not modify the existing design i.e add ICS functionality, otherwise a new design listing will be required.
To add more products to your design, select ‘Manage Submitted Products’ in the Getting Started page, Actions, Qualify More Products. The tool will take you through the updating process.
Ordering Information
| Order Model | Description |
|---|---|
| 453-00048 | 802.11ac + Bluetooth 5.2 LWB5+ M.2 Module, SDIO (WLAN) / UART (Bluetooth) |
| 453-00049 | 802.11ac + Bluetooth 5.2 LWB5+ M.2 Module, USB (WLAN) / USB (Bluetooth) |
| 453-00048-K1 | Development Kit for 1x1 802.11ac + Bluetooth 5.2 SDIO/UART M.2 Module |
| 453-00049-K1 | Development Kit for 1x1 802.11ac + Bluetooth 5.2 USB/USB M.2 Module |
Legacy - Revision History
| Version | Date | Notes | Contributor(s) | Approver |
|---|---|---|---|---|
| 1.0 | 07 Dec 2020 | Initial version | Andrew Chen | Jay White |
| 1.1 | 01 Feb 2021 | Updated Bluetooth v5.0 to v5.2 | Sue White | Jonathan Kaye |
| 1.2 | 03 Mar 2021 | Added two Bluetooth current consumption tables | Maggie Teng | Jonathan Kaye |
| 1.3 | 11 Aug 2021 | Added Peak PHY Calibration Current table (Table 18) Added Power-Up Sequence and Timing Requirements | Andrew Chen | Andy Ross |
| 1.4 | 27 Oct 2022 | Added note on maximum EIRP for Bluetooth in Specifications. | Dave Drogowski Connie Lin | Andy Ross |
| 1.5 | 1 Feb 2023 | Fixed pin 21 in Table 28 to “output” | Chris Laplante | Andrew Chen |
| 1.6 | 17 Feb 2023 | Added updated Terms and Conditions. | Dave Drogowski | Elaine Baxter |
| 1.7 | 30 May 2023 | Added support for latest WPA2/WPA3 Enterprise security standards. | Dave Drogowski | Andy Ross |
| 1.8 | 9 Sept 2023 | Added links to Regulatory Information Guide. | Dave Drogowski | Skofiar Kamberi |
| 1.9 | 9 Jan 2024 | Added 10 Crystal Oscillator Requirement | Dave Drogowski | Andy Ross |
| 2.0 | 31 Jan 2024 | Fixed frequency value for Channel 7 in Table 4: WLAN functions | Jacky Kuo | Andy Ross |
| 2.1 | 3 Apr 2024 | Added full support for WPA2/WPA3 Enterprise | Bob Monroe | Andy Ross |
| 2.2 | 1 Nov 2024 | Updated Bluetooth SIG Qualification. | Dave Drogowski | Jonathan Kaye |
| 2.3 | 3 Feb 2025 | Updated pin 54 and pin 56 in Table 28 | Jacky Kuo | Dave Drogowski |
| 3.0 | 11 Mar 2025 | Ezurio rebranding. Update pin 20 to 3.3V | Dave Drogowski Alex Mohr | Andrew Chen |
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