BL54L15 Series - Bluetooth LE + 802.15.4 + NFC

Python scripts can only be loaded onto a Canvas enabled device via serial interface such as UART or USB. Canvas FW is programmed over SWD programming interface only.

Ensure your custom hardware design has provisions for both SWD for Canvas FW programming and serial for loading python scripts.

Review the README.md of the canvas_python_firmware repository (https://github.com/Ezurio/canvas_python_firmware) for the hardware platform to locate the "Default REPL port"

When building an application in nRF Connect for VS Code you must add a build configuration, which includes selecting the board target that your application will be run on. When working with Ezurio's BL54L15, BL54L15u, or BL54L10 you should select the board as follows:

1) Click the in the field for the target board selection and type, "BL54 " to reduce the number of board targets listed to only the BL54 series of boards.

The board file variant selects the CPU core and security model the build will target. On the 54 Series you will see variants such as cpuapp, cpuapp/ns, cpuflpr, and cpuflpr/xip

cpuapp:

Refers to the application core, where Zephyr application firmware is run.  This selection builds for the app core with security features enabled (Trust Zone Secure).

*This build is recommended for most use cases.

cpuappns:

This variant builds a non-secure application image which runs alongside a secure image on Trust Zone-enabled devices where the the application core is partitioned into a secure domain and non-secure domain. The secure image is usually generated by Trusted Firmware-M or a secure bootloader).
This is typically used when developing the main application, while the secure firmware handles crypto keys and secure services.

cpuflpr:

Refers to builds for the network core also known as the Fast Lightweight Processor (flpr).

The network core is usually dedicated to the radio stack (BLE, 802.15.4, etc)

This build is typically used to add custom firmware directly on the network core, instead of using Nordic's precompiled controller firmware.

cpuflpr/xip:

The /xip variant means execute in place

This image is built to run directly from external flash, rather than being copied to RAM.

This is useful if the core firmware is too large to fit into RAM, or if it is desired to save RAM usage by running the code directly from flash. 

When working with the BL54L15 DVK or BL54L15u DVK most use cases should select bl54l15_dvk/nrf54l15/cpuapp.

NOTE: When developing with the BL54L15 DVK for an application that will run on the BL54L10 module it is recommended that you select bl54l15_dvk/nrf54l10/cpuapp. This variant enforces the reduced memory constraints that apply when working with the BL54L10.

The nRF54L15 BLE MCU used on the BL54L15 does not include an Audio PLL making it only possible to be used in a limited number of applications. The Audio PLL is used for isochronous channel synchronization for L and R streams meaning True Wireless Stereo (TWS) can’t be supported. However, other applications that do not need this may be able to use the BL54L15 in an Audio solution. 

Our BL54L15 module, based on the nRF54L15 SoC, has undergone updates to its pin and power supply configuration across different hardware versions. Pin 40 (VDD_nRF) has been removed and replaced by Pin 26 (VDDM_nRF). In current hardware revisions and reference designs, the pin formerly designated as VDDM_nRF, which served as the primary power supply, is now referred to as VDD_nRF. For all new designs, VDD_nRF must be used as the main power source instead of VDDM_nRF.

Note: Preliminary engineering samples featured a 40-pin footprint, while mass production versions from revision 3.0 onward use a 39-pin layout. The version number is printed on the module’s silkscreen, as illustrated in the example below — highlighted in red for clarity and easy identification. This change also applies to all related development boards and reflects Nordic’s decision to remove support for the medium voltage mode, which was only present in alpha and beta silicon versions.

Moving forward, normal voltage mode must be implemented and strictly followed. For the most up-to-date information on the operating voltage range for VDD_nRF, please refer to the latest BL54L15 datasheet available on our website: https://www.ezurio.com/documentation/datasheet-bl54l15-series.

Please reference the Nordic Migration Guide for nRF Connect SDK v2.8.0 for the required changes to use the nRF Connect SDK in VS Code with the BL54 series modules.

https://docs.nordicsemi.com/bundle/ncs-latest/page/nrf/releases_and_maturity/migration/migration_guide_2.8.html

Be sure to reference the requirements for the specific board based on the chipset. 

Note: If you are using a BL54H20 engineering DVK, based on Rev B silicon, you MUST follow the steps for Rev B silicon. Then select the nrf54h20dk/nrf54h20dk/cpuapp as the board target and set the Revision to 0.8.0.

Ezurio did provide breakout boards for our older BL600(EOL) modules but we do not produce breakout boards for any of our current range of Bluetooth modules as of 2024.

This includes all BL65x, BL53xx, BL54xxx, BTxxx, Vela and Lyra modules.

We do provide development kits for all of our module offerings. To learn more, visit any product page on ezurio.com.