i.MX 93 vs. i.MX 95 SoM Comparison Guide

Core Processor Architecture

The processor architecture is the most fundamental differentiator between these two platforms, and it deserves precise attention because the difference is not just "more cores" — it is a different philosophy for how workloads are partitioned across heterogeneous compute domains.

i.MX 93: Dual-Core Efficiency with M33 Companion

The i.MX 93 is built around a dual Arm Cortex-A55 cluster running at up to 1.7 GHz, paired with a 250 MHz Cortex-M33 real-time co-processor. This architecture cleanly separates application-level processing from low-latency control, always-on monitoring, and event-triggered wake-up tasks. The M33 can run independently while the A55 cluster is fully powered down — a capability that makes the i.MX 93 genuinely suited to battery-operated and thermally constrained designs.

i.MX 95: Heterogeneous Multi-Core with Deterministic Real-Time

The i.MX 95 implements what NXP calls an "energy flex" architecture. At its core: up to six Arm Cortex-A55 cores at 2.0 GHz, plus two independent real-time processors — an 800 MHz Arm Cortex-M7 and a 333 MHz Cortex-M33. The M7 is not an incremental upgrade from the i.MX 93's M33 companion; it runs at more than three times the clock speed and delivers deterministic real-time throughput that the i.MX 93 architecture simply cannot match.

Key decision point: If your application requires deterministic real-time processing alongside heavy application workloads — motor control, robotics, safety interlocks, ADAS sensor fusion — the i.MX 95's independent M7 safety domain is a non-negotiable requirement. The i.MX 93's M33 is adequate for lighter control and always-on tasks, but not for high-speed deterministic loops.

AI/ML Acceleration: NPU Comparison

For new embedded designs, AI/ML inference capability is now a primary platform selection driver. Both i.MX 9 processors include on-chip neural processing units — but they are architecturally distinct, and the performance gap is larger than the TOPS numbers alone suggest.

i.MX 93: Arm Ethos-U65 NPU

The i.MX 93 integrates an Arm Ethos-U65 neural processing unit optimized for energy-efficient edge inference. It handles the workloads that define modern IoT intelligence: keyword detection, vibration-based predictive maintenance, gesture recognition, and basic computer vision classification. For most industrial IoT and gateway designs — applications where AI augments rather than dominates the processing pipeline — the Ethos-U65 provides more than enough headroom.

i.MX 95: NXP eIQ Neutron NPU

The i.MX 95 introduces NXP's proprietary eIQ Neutron NPU, delivering 2 TOPS of neural processing capability. The Neutron's architecture is specifically designed for real-world inference efficiency rather than peak benchmark numbers. Two features drive this: a data reuse architecture that keeps weights and activations on-chip, minimizing DRAM memory access overhead; and a zero-copy execution model that eliminates unnecessary data transfers between the CPU and NPU.

The practical result: NXP's benchmarks show the Neutron NPU achieving approximately 3× better real-world throughput than the i.MX 8M Plus despite similar TOPS ratings. This is the distinction that matters for engineers selecting a platform — not peak theoretical TOPS, but what the silicon actually delivers on a deployed inference workload.

Shared Toolchain: NXP eIQ

Both platforms share NXP's eIQ software development environment, which is a meaningful practical benefit for teams building on both. The eIQ Toolkit converts models from TensorFlow, PyTorch, and ONNX to TFLite for NPU deployment. The Neutron Converter on the i.MX 95 adds both offline and on-device model compilation. OpenCV and OpenVX hardware-optimized libraries are available on both platforms for vision pre/post-processing.

Graphics, Display, and HMI Capability

If your application includes a human-machine interface — whether an industrial control panel, medical device touchscreen, or consumer-facing display — graphics capability is a hard constraint that directly determines your platform choice.

i.MX 93: Adequate for Simple HMIs

The i.MX 93 supports MIPI-DSI output and single-channel LVDS display. This is sufficient for embedded HMIs running lightweight UI frameworks at standard resolutions — think industrial parameter displays, status panels, and basic touchscreen controls. It is not designed for graphically intensive or high-resolution applications.

i.MX 95: 4K-Ready with Hardware GPU Acceleration

The i.MX 95 integrates an Arm Mali G310 V2 GPU running at 4000 MPix/s — a generational step beyond any i.MX 8 device. Combined with 4K encode/decode capability and 4K display output, this makes the i.MX 95 the unambiguous choice for any application requiring rich visual interfaces, smooth animations, high-resolution medical imaging, or multi-display deployments.

Design guidance: If your current design targets 1080p but the product roadmap includes 4K display or richer UI frameworks within 2–3 product generations, the i.MX 95 provides longevity that the i.MX 93 cannot. Both platforms carry a 15-year supply guarantee — factor the display roadmap in now.

Computer Vision and Image Signal Processing

Machine vision requirements — camera inputs, image quality, frame rates, and multi-sensor configurations — are increasingly non-negotiable in industrial automation, logistics, and medical imaging. The two platforms differ substantially here.

i.MX 93: Single-Camera, Standard Resolution

The i.MX 93 supports a single 2-lane MIPI CSI camera interface at up to 1080p30. This is workable for single-camera applications: barcode reading, basic inspection, or video conferencing endpoints. It does not support multi-camera configurations, high frame rate capture, or HDR processing.

i.MX 95: Full ISP Pipeline with Multi-Camera Support

The i.MX 95 includes a fully integrated image signal processor supporting 12MP at 45 FPS, 20-bit HDR processing, and RGB-IR sensor fusion. Multi-camera configurations are supported via up to 8 virtual MIPI-CSI channels. This level of ISP capability makes the i.MX 95 directly relevant to machine vision systems, autonomous mobile robots (AMRs), ADAS perception stacks, and industrial quality inspection — workloads that require calibrated, processed camera data rather than raw frames.

For engineers building around the NXP i.MX 9 platform for vision applications, the ISP capability alone may resolve the platform selection question. A single-camera 1080p30 ceiling is a hard architectural constraint that no software optimization can work around.

Functional Safety and Safety-Critical Design

This section applies to any application where a software or hardware failure can cause personal injury, property damage, or regulatory non-compliance. Industrial machinery, medical devices, and automotive systems are the obvious cases — but the scope is broader than engineers sometimes initially assume.

i.MX 95: ASIL-B Certified Safety Domain

The i.MX 95 achieves ASIL-B functional safety, directly targeting ISO 26262 (automotive) and IEC 61508 (industrial functional safety) compliance requirements. Its safety architecture consists of an independent safety domain comprising the Cortex-M7 and Cortex-M33 cores operating in isolation from the application processor cluster. Safety-critical workloads run in this isolated domain, physically separated from the A55 application stack — the correct architectural approach for safety-certified designs.

IEC 61508 and ISO 26262 both require the identification and mitigation of systematic and random hardware failures. The i.MX 95's hardware-based safety architecture provides the isolation, redundancy, and diagnostic coverage that these standards require. For engineers designing i.MX 95-based SoMs into safety-relevant applications, this is an architected feature — not a software workaround.

i.MX 93: No Safety Domain

The i.MX 93 does not include a hardware safety domain and does not achieve ASIL-B certification. For applications requiring IEC 61508 or ISO 26262 compliance, the i.MX 93 is not a viable platform choice, regardless of software-level mitigations. This is a non-negotiable binary — not a tradeoff to be managed.

Security Architecture and Regulatory Compliance

Both platforms include hardware security features — secure boot, cryptographic acceleration, and hardware root of trust — that establish a credible security foundation for IoT deployments. The distinction is in depth and in compliance posture.

i.MX 93 Security Baseline

The i.MX 93 supports secure boot, on-chip cryptographic acceleration, and hardware-backed key storage. For most industrial IoT and edge applications, this security baseline is appropriate. Ezurio's i.MX 93-based SoMs expose these capabilities for integration into secure boot chains and encrypted communication stacks. Combined with the platform's certified Wi-Fi 6 radio — WPA3 support included — the i.MX 93 presents a strong security posture for non-safety-critical deployments.

i.MX 95: Elevated Compliance Posture

The i.MX 95 extends the security baseline with safety-domain isolation, run-time attestation, and trust provisioning capabilities. NXP positions the i.MX 95 as aligned with the EU Cyber Resilience Act (CRA), which entered into force in December 2024 and begins applying compliance requirements to connected products with digital elements from December 2027. For enterprise and infrastructure deployments where regulatory compliance documentation is required — medical, automotive, industrial — the i.MX 95's elevated security architecture simplifies the compliance path.

Regulatory note: The EU Cyber Resilience Act imposes mandatory vulnerability disclosure, security update obligations, and Conformité Européenne (CE) marking requirements for connected products. While the i.MX 93 can meet baseline CRA requirements with appropriate firmware design, the i.MX 95's hardware-level security features provide a stronger foundation for CRA compliance documentation — particularly for Class II products under the Act.

Connectivity: Wired and Wireless

Both platforms are connectivity-rich, but the i.MX 95 adds high-throughput wired interfaces that matter for specific industrial and networking use cases.

Shared Wireless Foundation

Both the i.MX 93 SoM and i.MX 95 SoM provide certified Wi-Fi 6 (802.11ax) dual-band wireless — 2.4 GHz and 5 GHz — with optional 802.15.4 support and Bluetooth/BLE 5.4. Wi-Fi 6's OFDMA and BSS Coloring are particularly relevant for dense industrial deployments where multiple devices share RF spectrum. Ezurio's i.MX 9 SoM portfolio supports industrial temperature grade operation across both platforms. Optional 802.15.4 capability extends deployment scenarios to Thread/Zigbee mesh topologies where applicable.

i.MX 95 Wired Differentiation: 10GbE and PCIe

Beyond the shared wireless stack, the i.MX 95 adds dual GbE plus 10 Gigabit Ethernet and PCIe — connectivity options that open deployment scenarios the i.MX 93 cannot address. High-throughput industrial gateways aggregating data from dozens of downstream sensors, network edge compute nodes processing live video streams, and vision systems transferring large image buffers all benefit from 10GbE's bandwidth headroom and PCIe's low-latency expansion bus.

Shared Interfaces: CAN, USB, ADC

Both platforms include 2× CAN bus, dual USB, and ADC — the standard industrial field interfaces. CAN FD support covers the fieldbus requirements of most IIoT and industrial automation deployments.

Memory Subsystem and Bandwidth

Memory bandwidth is often the constraint that separates a smooth-running deployment from one that is perpetually bottlenecked — particularly for workloads combining AI inference, video buffering, and real-time control in parallel.

i.MX 93: LPDDR4

The i.MX 93 supports LPDDR4 memory. For its target workloads — moderate edge inference, lightweight HMI, IoT gateway processing — LPDDR4 bandwidth is appropriate. Engineers running modest AI models on the Ethos-U65 while maintaining a connected data path will not find LPDDR4 to be the system bottleneck.

i.MX 95: LPDDR5

The i.MX 95 supports LPDDR5, which delivers materially higher bandwidth than LPDDR4. This matters in three concrete scenarios: large AI models with significant weight and activation data movement; high-resolution video buffers for 4K encode/decode pipelines; and parallel high-throughput processing where multiple subsystems — NPU, GPU, ISP, and application cores — are concurrently active. If your application involves any of these, LPDDR5 is not a luxury — it is the architecture that makes the workload feasible.

Power Efficiency and Thermal Considerations

Power budget directly determines enclosure design, thermal management approach, and — for battery-powered products — deployment lifetime. This section deserves careful attention for any design with a constrained thermal envelope.

i.MX 93: Designed for Efficiency

NXP's ULP (Ultra-Low Power) architecture in the i.MX 93 is purpose-built for constrained power budgets. Multiple power domains allow independent gating of subsystems. Voltage and frequency scaling enable dynamic performance adjustment. The Cortex-M33 can remain active as a sensor aggregation and event detection engine while the A55 cluster is fully off — a capability that defines the architecture for always-on, event-triggered designs.

For battery-powered field devices, passively cooled enclosures, and outdoor edge deployments where thermal dissipation is a design constraint, the i.MX 93 is the correct architectural choice. The performance envelope is real but bounded — and within that envelope, the platform is genuinely efficient.

i.MX 95: Higher Performance, Higher Power

The i.MX 95 consumes more power by design. Six A55 cores at 2.0 GHz, an 800 MHz M7, LPDDR5, a full GPU, and an active ISP pipeline collectively require active thermal management in most deployment scenarios. Engineers targeting fanless industrial enclosures or outdoor equipment should budget thermal analysis time early, as the i.MX 95's power profile requires careful thermal path engineering.

Application Vertical Decision Matrix

The following table maps key application types to the recommended platform based on the technical requirements discussed above. Platform selection is rarely determined by a single factor — this matrix synthesizes the combined effect of compute, AI, safety, connectivity, display, and power requirements.

Practical Deployment Guidance: SoM Ecosystem and Pin Compatibility

One of the most significant practical advantages of the NXP i.MX 9 family — and a decisive factor for teams managing long product lifecycles — is pin-compatible SoM form factors. Engineers who start a design on the i.MX 93 can scale to the i.MX 95 without a full carrier board redesign.

Ezurio's i.MX 9 System on Module portfolio is built on this pin-compatibility principle. This eliminates one of the most costly risks in platform selection: committing to a carrier board layout for a processor that later proves inadequate for production workloads. With pin-compatible i.MX 93 and i.MX 95 SoMs, teams can prototype and validate on the more cost-effective platform, then qualify the i.MX 95 variant without a hardware redesign cycle.

Development Ecosystem and Software Continuity

Both platforms share NXP's Linux BSP, pre-built images for NXP EVK reference boards, and the eIQ ML software environment. A design team that develops on the i.MX 93 does not start from scratch when moving to the i.MX 95 — the software stack migrates with manageable delta. OTA update infrastructure, remote access, and fleet management tooling operate identically across both platforms.

Platform Selection Checklist

Use this checklist before finalizing platform selection:

1. Define AI inference requirements precisely — model architecture (CNN/RNN/LSTM), input resolution, and required inference rate. Map these to NPU capability before assuming either platform is adequate.
2. Determine safety classification — IEC 61508 SIL level or ISO 26262 ASIL level if applicable. If ASIL-B or SIL-2 is required, stop: the i.MX 95 is the only option.
3. Specify display requirements — target resolution, frame rate, number of displays, and UI framework rendering complexity. 4K or GPU-accelerated UI routes to the i.MX 95.
4. Count camera inputs and define ISP requirements — HDR, sensor fusion, frame rate. More than one camera or any HDR requirement routes to the i.MX 95.
5. Establish thermal budget — passive vs. active cooling, ambient temperature range, enclosure dimensions. Battery-powered or passive-only designs should default to the i.MX 93 unless the i.MX 95 feature set is explicitly required.
6. Model BOM cost impact — at volume, the i.MX 93 SoM is meaningfully less expensive. If the i.MX 95 feature set is not required, the i.MX 93 is the commercially correct choice.
7. Confirm regulatory requirements — EU CRA compliance class, CE marking scope, ASIL/SIL certification requirements. These frame the security and safety architecture decisions above.

Regulatory and Standards Landscape

Platform selection does not happen in a regulatory vacuum. Several active and forthcoming regulatory frameworks directly influence which platform is appropriate for a given product.

EU Cyber Resilience Act (CRA)

The EU Cyber Resilience Act establishes mandatory cybersecurity requirements for connected products placed on the EU market. Class II products — including industrial control systems and products with safety-relevant functions — face the most stringent requirements. The i.MX 95's run-time attestation and trust provisioning capabilities provide a stronger hardware foundation for CRA Class II compliance documentation.

ISO 26262 / IEC 61508 Functional Safety

ISO 26262 (automotive functional safety) and IEC 61508 (industrial functional safety) both define rigorous hardware and software development process requirements. The i.MX 95's ASIL-B certification provides a platform foundation that can be leveraged in a product's safety case — reducing the independent verification burden compared to implementing safety measures purely in software on an uncertified platform.

FCC and ETSI Radio Certification

Both platforms include integrated Wi-Fi 6 radios. Ezurio's SoMs carry pre-certified radio modules, offloading the FCC and ETSI certification burden from the end product. Engineers building for both US and EU markets benefit from Ezurio's pre-certified module designs — a practical advantage that accelerates regulatory approval timelines and reduces compliance risk.

NXP Product Longevity Program

Both the i.MX 93 and i.MX 95 are part of NXP's Product Longevity Program, guaranteeing a minimum of 15 years of silicon availability. For applications with long field lifetimes — industrial automation, medical devices, infrastructure equipment — this guarantee is a procurement requirement, not a marketing differentiator. Both platforms satisfy it.