iMX95 System-on-Module: Nitrogen95 SMARC

The Nitrogen95 SMARC is designed to meet RoHS and REACH compliance requirements. For formal compliance documentation — such as declarations of conformity or REACH SVHC substance disclosures required for procurement or supply chain qualification — contact Ezurio's sales or compliance team. Compliance certificates are provided on request for qualifying customers.

Ezurio follows a defined product lifecycle policy including Product Change Notifications (PCNs) and End-of-Life (EOL) notices. The NXP i.MX 95 SoC is positioned as a long-lifecycle industrial and automotive-grade processor, underpinning Ezurio's ability to offer extended availability commitments. For designs committed to multi-year production, Ezurio recommends confirming longevity commitments directly with the sales team, as product lifetime guarantees are available for high-volume customers. Ezurio's longevity policy is published at ezurio.com/support/faqs.

The Nitrogen95 uses the SMARC 2.2 standard — a 314-pin connector, 82 × 50 mm module footprint defined by PICMG. It provides pin-level and mechanical compatibility with existing SMARC 2.2 carrier boards, a migration path from Nitrogen93 (i.MX 93) and Nitrogen8M Plus SMARC designs, and access to a broad ecosystem of commercial carrier boards. The module operates from a single 5V supply with 1.8V or 3.3V I/O signaling.

Ezurio maintains an open-source Yocto BSP for the Nitrogen95 on GitHub, built on the Scarthgap (or later) release. The recommended workflow is: clone the Ezurio Nitrogen95 manifest repository, use repo init / repo sync to fetch all layers, build with bitbake against the nitrogen95 machine configuration, and flash to eMMC using UUU or SD card for initial bring-up. Documentation, software release notes, and pre-built images are available at ezurio.com/support/series/nitrogen95-smarc.

The Nitrogen95 supports Linux (Yocto / OpenEmbedded BSP maintained by Ezurio), U-Boot bootloader, Boot2Qt for Qt-based HMI and display applications, and Kynetics EADT (Enterprise Android Device Toolkit) for Android-based designs. Ezurio's BSP integrates NXP's eIQ ML inference framework, V4L2 camera drivers, and the TSN networking stack out of the box. For teams migrating from i.MX 8 or i.MX 93 designs, the i.MX 9 software ecosystem maintains broad API compatibility.

Yes. The i.MX 95's EdgeLock secure enclave and HAB (High Assurance Boot) infrastructure allow you to disable the U-Boot shell on production devices, enable secure boot so only signed images are accepted, and fuse the device to prevent boot from unauthorized media (e.g. SD card) in production. Ezurio's Yocto BSP includes documentation and tooling for enabling HAB and configuring secure boot on the Nitrogen95.

Security is built into silicon via NXP's EdgeLock® secure enclave — an autonomous, self-managed security subsystem handling silicon root of trust, secure boot, run-time attestation, trust provisioning, fine-grain key management, cryptographic services (AES, RSA, ECC, SHA), Arm TrustZone-M on the Cortex-M33 domain, and Trusted Resource Domain Controller (TRDC) for access isolation. EdgeLock reduces the engineering effort needed for IEC 62443, FIPS-level, and Arm PSA Certified certification paths. For Class 2 and Class 3 medical device projects, the secure boot and attestation capabilities support IEC 62304 and FDA cybersecurity guidance compliance.

The Nitrogen95 is offered in two RAM configurations with a fixed 16 GB eMMC: 4 GB LPDDR5X (16-bit bus, inline ECC) and 8 GB LPDDR5X (16-bit bus, inline ECC), each available in standard and industrial temperature grades. LPDDR5X offers higher bandwidth and lower power than LPDDR4X. Inline ECC is a hard requirement for functional safety and industrial reliability grades. An SDXC slot on the carrier provides removable storage. Choose 8 GB for workloads involving large ML models, 4K video buffers, or complex multi-process Linux stacks.

Wireless-equipped SKUs integrate the Ezurio Sona family Wi-Fi / Bluetooth combo radio, supporting Wi-Fi 6 / Wi-Fi 6E (802.11ax) and Bluetooth 5.4. The Sona module is pre-calibrated on-board with a complete RF path — bandpass filter, diplexer, switches, reference TCXO, and PMU — reducing carrier-board RF design complexity. Three MHF4 RF connectors (2× WLAN, 1× Bluetooth) provide antenna flexibility. Wireless-free SKUs are also available for designs that use wired Ethernet only.

The Nitrogen95 exposes the full i.MX 95 networking capability on-module: 2× 1 GbE with TSN (IEEE 802.1Qbv, 802.1AS, EEE), 1× 10 GbE with TSN and IEEE 1588, 2× CAN-FD, 2× PCIe Gen 3.0 ×1, 1× USB3.0 Type-C, 2× USB3.0, 1× USB2.0, and 4× UART. TSN-capable Ethernet enables deterministic, time-synchronized communication essential for factory automation, robotics, and motion-control systems without a separate industrial networking ASIC.

Yes — the Nitrogen95 supports triple independent display output: 1× MIPI-DSI at 4-lane / 2.5 Gbps supporting 4Kp30 or 3840 × 1440p60, and 2× LVDS Tx at 1080p60 each (configurable as 2× 4-lane or 1× 8-lane). The Arm Mali-G310 GPU handles OpenGL ES 3.2, Vulkan 1.3, and OpenCL 3.0 at 64 GFLOPS FP32. The hardware VPU provides 4Kp60 H.265 and H.264 encode and decode. This makes the Nitrogen95 well-suited for multi-panel HMI, digital signage, medical imaging workstations, and EV charger displays.

The Nitrogen95 exposes a full vision processing pipeline: 2× MIPI-CSI interfaces at 4-lane / 2.5 Gbps per lane with integrated ISP and PHY, support for up to 8 simultaneous cameras via MIPI virtual channels, and resolution modes of 1× 4Kp60, 2× 4Kp30, 4× 1080p60, or 8× 1080p30. The eIQ Neutron NPU and V2X accelerator sit downstream of the ISP, enabling in-pipeline AI inference on raw sensor data — well-suited for smart cameras, AMRs, and automated optical inspection systems.

 The i.MX 95 integrates the eIQ Neutron NPU, delivering up to 2.0 TOPS of neural-network inference throughput (nominal 800 MHz, overdrive 1.0 GHz). The NPU includes 1 MB of embedded SRAM shared with the SoC when ML acceleration is not active. For embedded engineers evaluating an i.MX 95 SOM for edge AI, this means you can run object detection, image classification, or anomaly-detection models locally without a discrete accelerator chip — reducing BOM cost, board area, and thermal requirements. NXP's eIQ toolkit supports TensorFlow Lite, ONNX, and PyTorch workflows.

 Yes. The i.MX 95's asymmetric multiprocessing (AMP) architecture dedicates the Cortex-M7 core entirely to real-time workloads while the Cortex-A55 cluster runs Linux. This means you can run deterministic control loops (motion control, sensor acquisition, protocol stacks) on the M7 simultaneously with a full Linux stack on the A55 — without inter-board latency or a separate MCU on your carrier board. The Cortex-M33 adds a third domain for safety/low-power functions such as watchdog management and secure key storage, further reducing the need for external companion chips.

Our Universal SMARC Carrier is orderable both as a standalone carrier board (SMARC_CAR_BRD) and as a kit (SMARC_CAR) complete with power, data, and antenna cable options. 

• The part # SMARC_CAR option includes:
• 1 x SMARC_CAR_BRD  (Main Carrier board that SMARC SOMs plug into) 
• 1 x 5V Power Supply (USA plug connector only) 
• 1 x DB9 Serial Cable 
• 3 x EFB2471A3S-10MH4L (Tri-Band Wi-Fi Antennas) 
• 2 x 001-0021 (Dual-Band Wi-Fi Antennas) 
• 1 x Insert Card 

The part # SMARC_CAR_BRD is also purchasable on its own and this is the main carrier board. 

PLEASE NOTE – neither of these 2 part numbers include either a Nitrogen or Tungsten SMARC, they are purchased separately to meet the needs of your application. 

The M.2 Slot on the Universal SMARC Carrier board is E key.